The voltage regulation loop in the LM76005-Q1 regulates the FB voltage to be the same as the internal reference voltage. The output voltage of the LM76005-Q1 is set by a resistor divider to program the ratio from V_OUT to V_FB. The resistor divider is connected from the output node to ground with the mid-point connecting to the FB pin.

Figure 7-2 Output Voltage Setting

The voltage reference system produces a precise ±1% voltage reference over temperature. TI recommends using divider resistors with 1% tolerance or better with temperature coefficient of 100 ppm or lower. Selection of R_FBT equal or lower than 100 kΩ is also recommended. R_FBB can be calculated by Equation 1:

Equation 1.

Larger R_FBT and R_FBB values reduce the current that goes through the divider, helping to increase light load efficiency. However, larger values also make the feedback path more susceptible to noise. If efficiency at very light load is not critical in a certain application, TI recommends R_FBT = 10 kΩ to 100 kΩ. If the resistor divider is not connected properly, output voltage cannot be regulated because the feedback loop is broken. If the FB pin is shorted to ground or disconnected, the output voltage is driven close to V_IN because the regulator detects very low voltage on the FB node. The load connected to V_OUT can be damaged in this case. It is important to route the feedback trace away from the noisy area of the PCB. For more layout recommendations, see Section 10.

The minimum output voltage achievable equals V_FB, with R_FBB open. The maximum V_OUT is limited by the maximum duty cycle at a given frequency:

where

• t_{OFF_MIN} is the minimum off-time of the HS switch
• T_SW = 1 / f_SW is the switching period

Ideally, without frequency foldback, V_{OUT_MAX} = V_{IN_MIN} × D_MAX

Maximum output voltage with frequency foldback can be estimated using Equation 3:

Equation 3.