SNIS207 December   2018 LM95071-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Temperature Monitor Application
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Function
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Ratings
    4. 6.4 Thermal Information
    5. 6.5 Temperature-to-Digital Converter Characteristics
    6. 6.6 Logic Electrical Characteristics - Digital DC Characteristics
    7. 6.7 Logic Electrical Characteristics - Serial Bus Digital Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Up and Power Down
      2. 8.3.2 Temperature Data Format
      3. 8.3.3 Tight Accuracy, Fine Resolution and Low Noise
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode/Manufacturer ID
    5. 8.5 Programming
      1. 8.5.1 Serial Bus Interface
      2. 8.5.2 Serial Bus Timing Diagrams
    6. 8.6 Register Maps
      1. 8.6.1 Internal Register Structure
        1. 8.6.1.1 Configuration Register
        2. 8.6.1.2 Temperature Register
        3. 8.6.1.3 Manufacturer/Device ID Register
  9. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Community Resource
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Logic Electrical Characteristics - Digital DC Characteristics

Unless otherwise noted, these specifications apply for VDD = 2.4 V to 5.5 V(1).
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
VIN(1) Logical “1” Input Voltage TA = TJ = TMIN to TMAX 0.7 × VDD VDD + 0.3 V
VIN(0) Logical “0” Input Voltage TA = TJ = TMIN to TMAX −0.3 0.3 × VDD V
Input Hysteresis Voltage VDD = 3 V to 3.6 V TA = TJ = +25°C 0.4 V
TA = TJ = TMIN to TMAX 0.33
IIN(1) Logical “1” Input Current VIN = VDD TA = TJ = +25°C 0.005 µA
TA = TJ = TMIN to TMAX 3
IIN(0) Logical “0” Input Current VIN = 0 V TA = TJ = +25°C −0.005 µA
TA = TJ = TMIN to TMAX −3
CIN All Digital Inputs TA = TJ = +25°C 20 pF
VOH High Level Output Voltage IOH = −400 µA, TA = TJ = TMIN to TMAX 2.25 V
VOL Low Level Output Voltage IOL = +1.6 mA, TA = TJ = TMIN to TMAX 0.4 V
IO_TRI-STATE TRI-STATE ®Output Leakage Current VO = GND
VO = VDD, TA = TJ = TMIN to TMAX
−1 +1 µA
Typicals are at TA = 25°C and represent most likely parametric norm.
Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).