SNOSC51D March   1998  – February 2024 LMC660 , LMC662

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information LMC662
    5. 5.5 Thermal Information LMC660
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Amplifier Topology
      2. 6.1.2 Compensating Input Capacitance
      3. 6.1.3 Capacitive Load Tolerance
      4. 6.1.4 Bias Current Testing
    2. 6.2 Typical Applications
    3. 6.3 Layout
      1. 6.3.1 Layout Guidelines
        1. 6.3.1.1 Printed Circuit Board Layout for High-Impedance Work
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3.     Trademarks
    4. 7.3 Electrostatic Discharge Caution
    5. 7.4 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • N|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Typical Characteristics

at TA = 25°C, VS = ±7.5V, VOUT = mid-supply, RL≥ 1MΩ (unless otherwise specified)

GUID-8DB87D1D-48AD-4A68-98D8-E8292AFF51AC-low.png
 
Figure 5-1 Supply Current vs Supply Voltage
GUID-20240205-SS0I-TSQX-NHTF-QT1HQQJHM3GL-low.svg
 
Figure 5-3 Offset Voltage vs Common-Mode Voltage
GUID-20240207-SS0I-K37P-ZCPS-V3Q1HCJPQC39-low.svg
 
Figure 5-5 Input Bias Current vs Input Common-Mode Voltage
GUID-DB72D87A-267A-481E-BB43-2B4762B01789-low.png
 
Figure 5-7 Output Characteristics Current Sinking
GUID-AB121116-9C45-4CA2-830C-06544AA2AD68-low.png
 
Figure 5-9 Input Voltage Noise vs Frequency
GUID-CCDD9307-D43D-41C0-819C-1E85895940C2-low.png
 
Figure 5-11 Open-Loop Frequency Response
GUID-4E24D55D-8705-4AD3-9BC2-63C74B2C706C-low.png
 
Figure 5-13 Noninverting Large-Signal Pulse Response
GUID-D8D51688-5734-4EF5-BA40-902CFCCC7DA3-low.png
Avoid resistive loads < 500Ω because of possible instability
Figure 5-15 Stability vs Capacitive Load
GUID-A036F77A-3D67-4DFA-90BB-1B7D262C1047-low.png
 
Figure 5-2 Offset Voltage
GUID-54AD6C4B-4AF1-4933-9814-F352371D6A73-low.png
 
Figure 5-4 Input Bias Current
GUID-20240207-SS0I-XCG4-WBTW-B0MJ3WPBTRG2-low.svg
VS = ±2.5V  
Figure 5-6 Input Bias Current vs Input Common-Mode Voltage
GUID-FF7CB470-92D9-4883-B38D-6B5E5278A1D8-low.png
 
Figure 5-8 Output Characteristics Current Sourcing
GUID-63A73BD0-E2E9-432B-973F-EB79C65C1C8B-low.png
 
Figure 5-10 CMRR vs Frequency
GUID-256B8600-3A57-4199-830C-14096184565A-low.png
 
Figure 5-12 Frequency Response vs Capacitive Load
GUID-EEA7E71C-C7F2-4300-B4AC-AA4C3A31B335-low.png
Avoid resistive loads < 500Ω because of possible instability
Figure 5-14 Stability vs Capacitive Load