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LMC660

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Quad, 15.5-V, 1.4-MHz operational amplifier

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Data sheet

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TLV9104 ACTIVE Quad, 16-V 1.1-MHz low-power (0.12 mA) operational amplifier Pin-to-pin upgrade with improved performance: lower Vos(1.5mV), higher slew rate(4.5V/us) and output current(80mA)

LMC660

ACTIVE
Data sheet Order now

Product details

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.75 Rail-to-rail In to V-, Out GBW (typ) (MHz) 1.4 Slew rate (typ) (V/µs) 1.1 Vos (offset voltage at 25°C) (max) (mV) 3 Iq per channel (typ) (mA) 0.38 Vn at 1 kHz (typ) (nV√Hz) 22 Rating Catalog Operating temperature range (°C) -40 to 85 Offset drift (typ) (µV/°C) 1.3 Input bias current (max) (pA) 2 CMRR (typ) (dB) 83 Iout (typ) (A) 0.021 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.4 Input common mode headroom (to positive supply) (typ) (V) -1.9 Output swing headroom (to negative supply) (typ) (V) 0.1 Output swing headroom (to positive supply) (typ) (V) -0.13
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.75 Rail-to-rail In to V-, Out GBW (typ) (MHz) 1.4 Slew rate (typ) (V/µs) 1.1 Vos (offset voltage at 25°C) (max) (mV) 3 Iq per channel (typ) (mA) 0.38 Vn at 1 kHz (typ) (nV√Hz) 22 Rating Catalog Operating temperature range (°C) -40 to 85 Offset drift (typ) (µV/°C) 1.3 Input bias current (max) (pA) 2 CMRR (typ) (dB) 83 Iout (typ) (A) 0.021 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.4 Input common mode headroom (to positive supply) (typ) (V) -1.9 Output swing headroom (to negative supply) (typ) (V) 0.1 Output swing headroom (to positive supply) (typ) (V) -0.13
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6
  • Rail-to-rail output swing
  • Specified for 2kΩ and 600Ω loads
  • High voltage gain: 126dB
  • Low input offset voltage: 3mV
  • Low offset voltage drift: 1.3µV/°C
  • Ultra low input bias current: 2fA
  • Low voltage noise: 22nV/√Hz
  • Input common-mode range includes V−
  • Operating range from 4.75V to 15.5V supply
  • ISS = 400µA/amplifier; Independent of V+
  • Slew rate: 1.1V/µs
  • Rail-to-rail output swing
  • Specified for 2kΩ and 600Ω loads
  • High voltage gain: 126dB
  • Low input offset voltage: 3mV
  • Low offset voltage drift: 1.3µV/°C
  • Ultra low input bias current: 2fA
  • Low voltage noise: 22nV/√Hz
  • Input common-mode range includes V−
  • Operating range from 4.75V to 15.5V supply
  • ISS = 400µA/amplifier; Independent of V+
  • Slew rate: 1.1V/µs

The dual LMC662 and quad LMC660 (LMC66x) are CMOS operational amplifiers designed for operation from a single supply, and built with TI’s advanced CMOS process. The device operates from 5V to 15V and features rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input offset voltage (VOS), offset drift, and broadband noise as well as voltage gain into realistic loads (2kΩ and 600Ω) are all equal to or better than widely accepted bipolar equivalents.

The dual LMC662 and quad LMC660 (LMC66x) are CMOS operational amplifiers designed for operation from a single supply, and built with TI’s advanced CMOS process. The device operates from 5V to 15V and features rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input offset voltage (VOS), offset drift, and broadband noise as well as voltage gain into realistic loads (2kΩ and 600Ω) are all equal to or better than widely accepted bipolar equivalents.
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Type Title Date
* Data sheet LMC66x CMOS Dual Operational Amplifiers datasheet (Rev. D) PDF | HTML 28 Feb 2024
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
Application note AN-856 A SPICE Comp Macromodel for CMOS Op Amplifiers (Rev. C) 06 May 2013
Application note Effect of Heavy Loads on Accuracy and Linearity of Op Amp Circuits (Rev. B) 22 Apr 2013

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