SNOSC51D March   1998  – February 2024 LMC660 , LMC662

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information LMC662
    5. 5.5 Thermal Information LMC660
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Amplifier Topology
      2. 6.1.2 Compensating Input Capacitance
      3. 6.1.3 Capacitive Load Tolerance
      4. 6.1.4 Bias Current Testing
    2. 6.2 Typical Applications
    3. 6.3 Layout
      1. 6.3.1 Layout Guidelines
        1. 6.3.1.1 Printed Circuit Board Layout for High-Impedance Work
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3.     Trademarks
    4. 7.3 Electrostatic Discharge Caution
    5. 7.4 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Electrical Characteristics

at TA = +25°C, VS = 5V (V– = 0V), VCM = 1.5V, VOUT = VS / 2, and RL = 1MΩ connected to VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage  LMC66xAI ±1 ±3 mV
TA = –40°C to +85°C ±3.3
LMC66xC ±1 ±6
TA = 0°C to 70°C ±6.3
dVOS/dT Input offset voltage drift  LMC66xAI TA = –40°C to +85°C ±1.3 µV/°C
LMC66xC TA = 0°C to 70°C ±1.3
PSRR Power-supply rejection ratio Positive,
5V ≤ VS ≤ 15V
 		 LMC66xAI 75 85 dB
LMC66xAI
TA = –40°C to +85°C		 72
LMC66xC 66 85
LMC66xC
TA = 0°C to 70°C		 63
Negative,
–10V ≤ VS ≤  0V		 LMC66xAI 84 94
LMC66xAI
TA = –40°C to +85°C		 81
LMC66xC 74 94
LMC66xC
TA = 0°C to 70°C		 71
INPUT BIAS CURRENT
IB Input bias current ±2 fA
LMC66xAI TA = –40°C to +85°C ±4 pA
LMC66xC TA = 0°C to 70°C ±2
IOS Input offset current ±1 fA
LMC66xAI TA = –40°C to +85°C ±2 pA
LMC66xC TA = 0°C to 70°C ±1
NOISE
en Input voltage noise density f = 1kHz 22 nV/√Hz
in Input current noise density f = 1kHz  4 fA/√Hz
THD Total harmonic distortion f = 10kHz, G = – 10V/V, RL = 2kΩ, VOUT = 8Vpp, VS = 15V  0.2 %
INPUT VOLTAGE
VCM Common-mode voltage range To positive rail,
5V ≤ VS ≤ 15V,
CMRR > 60dB		 (V+) – 1.9 (V+) – 2.3 V
LMC66xAI, TA = –40°C to +85°C (V+) – 2.5
LMC66xC, TA = 0°C to 70°C (V+) – 2.6
To negative rail,
5V ≤ VS ≤ 15V,
CMRR > 60dB		 (V–) – 0.1 (V–) – 0.4
LMC66xAI, TA = –40°C to +85°C (V–)
LMC66xC, TA = 0°C to 70°C (V–)
CMRR Common-mode rejection ratio VS = 15V, 0V < VCM < 12V LMC66xAI 75 85 dB
LMC66xAI, TA = –40°C to +85°C 72
LMC66xC 66 85
LMC66xC, TA = 0°C to 70°C 63
INPUT IMPEDANCE
RIN Input resistance >1 TΩ
OPEN-LOOP GAIN
AOL Open-loop voltage gain Sourcing,
VS = 15V, VCM = 7.5V,
7.5V < VO < 11.5V, RL = 2kΩ		 LMC66xAI 440 2000 V/mV
LMC66xAI, TA = –40°C to +85°C 400
LMC66xC 300 2000
LMC66xC, TA = 0°C to 70°C 200
Sinking,
VS = 15V, VCM = 7.5V,
2.5V < VO < 7.5V, RL = 2kΩ		 LMC66xAI 180 500
LMC66xAI, TA = –40°C to +85°C 120
LMC66xC 90 500
LMC66xC, TA = 0°C to 70°C 80
Sourcing,
VS = 15V, VCM = 7.5V,
7.5V < VO < 11.5V, 
RL = 600Ω		 LMC66xAI 220 1000
LMC66xAI, TA = –40°C to +85°C 200
LMC66xC 150 1000
LMC66xC, TA = 0°C to 70°C 100
Sinking,
VS = 15V, VCM = 7.5V,
2.5V < VO < 7.5V, 
RL = 600Ω		 LMC66xAI 100 250
LMC66xAI, TA = –40°C to +85°C 60
LMC66xC 50 250
LMC66xC, TA = 0°C to 70°C 40
FREQUENCY RESPONSE
GBW Gain bandwidth product 1.4 MHz
SR Slew rate(2) VS = 15V, 10V step  1.1 V/µs
LMC66xAI, TA = –40°C to +85°C 0.6
LMC66xC, TA = 0°C to 70°C 0.7
θm Phase margin 50 °
Crosstalk Dual and quad channel, VS = 15V, RL = 100kΩ to 7.5V, f = 1kHz, VOUT = 12Vpp 130 dB
OUTPUT
VO Voltage output swing Positive rail,
VS = 5V, RL = 2kΩ		 LMC66xAI 4.82 4.87 V
LMC66xAI, TA = –40°C to +85°C 4.79
LMC66xC 4.78 4.87
LMC66xC, TA = 0°C to 70°C 4.76
Negative rail,
VS = 5V, RL = 2kΩ		 LMC66xAI 0.10 0.15
LMC66xAI, TA = –40°C to +85°C 0.17
LMC66xC 0.10 0.19
LMC66xC, TA = 0°C to 70°C 0.21
Positive rail,
VS = 5V, RL = 600Ω		 LMC66xAI 4.41 4.61
LMC66xAI, TA = –40°C to +85°C 4.31
LMC66xC 4.27 4.61
LMC66xC, TA = 0°C to 70°C 4.21
Negative rail,
VS = 5V, RL = 600Ω		 LMC66xAI 0.30 0.50
LMC66xAI, TA = –40°C to +85°C 0.56
LMC66xC 0.30 0.63
LMC66xC, TA = 0°C to 70°C 0.69
Positive rail,
VS = 15V, RL = 2kΩ		 LMC66xAI 14.50 14.63
LMC66xAI, TA = –40°C to +85°C 14.44
LMC66xC 14.37 14.63
LMC66xC, TA = 0°C to 70°C 14.32
Negative rail,
VS = 15V, RL = 2kΩ		 LMC66xAI 0.26 0.35
LMC66xAI, TA = –40°C to +85°C 0.40
LMC66xC 0.26 0.44
LMC66xC, TA = 0°C to 70°C 0.48
Positive rail,
VS = 15V, RL = 600Ω		 LMC66xAI 13.35 13.90
LMC66xAI, TA = –40°C to +85°C 13.15
LMC66xC 12.92 13.90
LMC66xC, TA = 0°C to 70°C 12.76
Negative rail,
VS = 15V, RL = 600Ω		 LMC66xAI 0.79 1.16
LMC66xAI, TA = –40°C to +85°C 1.32
LMC66xC 0.79 1.45
LMC66xC, TA = 0°C to 70°C 1.58
ISC Short-circuit current Sourcing,
VS = 5V, VOUT = 0V		 LMC66xAI 16 22 mA
LMC66xAI, TA = –40°C to +85°C 14
LMC66xC 13 22
LMC66xC, TA = 0°C to 70°C 11
Sinking,
VS = 5V, VOUT = 13V		 LMC66xAI 16 21
LMC66xAI, TA = –40°C to +85°C 14
LMC66xC 13 21
LMC66xC, TA = 0°C to 70°C 11
Sourcing,
VS = 15V, VOUT = 0V		 LMC66xAI 28 40
LMC66xAI, TA = –40°C to +85°C 25
LMC66xC 23 40
LMC66xC, TA = 0°C to 70°C 21
Sinking,
VS = 15V, VOUT = 13V(1)		 LMC66xAI 28 39
LMC66xAI, TA = –40°C to +85°C 24
LMC66xC 23 39
LMC66xC, TA = 0°C to 70°C 20
POWER SUPPLY
IQ Quiescent current per amplifier LMC662
VOUT = 7.5V, VS = 15V		 LMC662AI 375 650 µA
LMC662AI, TA = –40°C to +85°C 750
LMC662C 375 800
LMC662C, TA = 0°C to 70°C 900
LMC660
VOUT = 7.5V, VS = 15V		 LMC660AI 375 550
LMC660AI, TA = –40°C to +85°C 650
LMC660C 375 675
LMC660C, TA = 0°C to 70°C 725
(1) Do not connect output to V+ when V+ is greater than 13V or reliability can be adversely affected.
(2) Specification limit established from device population bench system measurements across multiple lots. Number specified is the slower of the positive and negative slew rates.