SLUSF82B January   2024  – November 2024 LMG3100R017 , LMG3100R044

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Propagation Delay and Mismatch Measurement
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Inputs
      2. 7.3.2 Start-up and UVLO
      3. 7.3.3 Bootstrap Supply Voltage Clamping
      4. 7.3.4 Level Shift
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VCC Bypass Capacitor
        2. 8.2.2.2 Bootstrap Capacitor
        3. 8.2.2.3 Slew Rate Control
        4. 8.2.2.4 Use With Analog Controllers
        5. 8.2.2.5 Power Dissipation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • VBE|15
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The LMG3100 device is a 100V continuous, 120V pulsed Gallium Nitride (GaN) FET with integrated driver. Device is offered in two Rds(on) and max current variants, 126A/1.7mΩ for LMG3100R017 and 46A/4.4mΩ for LMG3100R044. The device consists of a 100V GaN FET driven by a high-frequency GaN FET driver. The LMG3100 incorporates a high side level shifter and bootstrap circuit, so that two LMG3100 devices can be used to form a half bridge without an additional level shifter.

GaN FETs provide significant advantages for power conversion as they have zero reverse recovery and very small input capacitance CISS and output capacitance COSS. The driver and the GaN FET are mounted on a completely bond-wire free package platform with minimized package parasitic elements. The LMG3100 device is available in a 6.5mm × 4mm × 0.89mm lead-free package and can be easily mounted on PCBs.

The TTL logic compatible inputs can support 3.3V and 5V logic levels regardless of the VCC voltage. The proprietary bootstrap voltage clamping technique ensures the gate voltages of the enhancement mode GaN FETs are within a safe operating range.

The device extends advantages of discrete GaN FETs by offering a more user-friendly interface. It is an ideal solution for applications requiring high-frequency, high-efficiency operation in a small form factor.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
LMG3100R017VBE (VQFN, 15)6.50mm × 4.0mm
LMG3100R044
(1) For all available packages, see Section 11.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
LMG3100R017 LMG3100R044 Simplified Block Diagram Simplified Block Diagram