SNOSD91B March 2019 – February 2020 LMG3410R150 , LMG3411R150
PRODUCTION DATA.
The allowed repetitive SOA for the LMG341xR150 (Figure 12) is defined by the peak drain current (IDS) and the drain to source voltage (VDS) of the device during turn on. The peak drain current during switching is the sum of several currents going into drain terminal: the inductor current (Iind); the current required to charge the COSS of the other GaN device in the totem pole; and the current required to charge the parasitic capacitance (Cpar) on the switching node. 47 pF is used as an average COSS of the device during switching. The parasitic capacitance on the switch node may be estimated by using the overlap capacitance of the PCB. A boost topology is used for the SOA testing. The circuit shown in Figure 19 is used to generate the SOA curve in Figure 12. For reliable operation, the junction temperature of the device must also be limited to 125 °C. The IDS of Figure 12 can be calculated by:
where