SNLS531B April   2016  – June 2018 LMH0324

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Block Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Recommended SMBus Interface AC Timing Specifications
    7. 6.7 Serial Parallel Interface (SPI) AC Timing Specifications
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Input Configuration Pins
      2. 7.3.2 Carrier Detect
      3. 7.3.3 Adaptive Cable Equalizer
      4. 7.3.4 Launch Amplitude
      5. 7.3.5 Input-Output Mux Selection
      6. 7.3.6 Output Function Control
      7. 7.3.7 Output Driver Amplitude and De-Emphasis Control
      8. 7.3.8 Additional Programmability
        1. 7.3.8.1 Cable Length Indicator (CLI)
        2. 7.3.8.2 Digital MUTEREF
    4. 7.4 Device Functional Modes
      1. 7.4.1 System Management Bus (SMBus) Mode
        1. 7.4.1.1 SMBus Read and Write Transactions
          1. 7.4.1.1.1 SMBus Write Operation Format
          2. 7.4.1.1.2 SMBus Read Operation Format
      2. 7.4.2 Serial Peripheral Interface (SPI) Mode
        1. 7.4.2.1 SPI Read and Write Transactions
          1. 7.4.2.1.1 SPI Write Transaction Format
          2. 7.4.2.1.2 SPI Read Transaction Format
        2. 7.4.2.2 SPI Daisy Chain
    5. 7.5 LMH0324 Register Map
      1. 7.5.1 Share Register Page
      2. 7.5.2 CableEQ/Drivers Register Page
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 General Guidance for SMPTE Applications
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Recommended VOD and DE Register Settings
      4. 8.2.4 Application Performance Plots
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RTW|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2 Detailed Design Procedure

The following general design procedure is recommended:

  1. Select a suitable power supply voltage for the LMH0324. It can be powered from a single 2.5 V or 1.8 V supply. See Power Supply Recommendations for details.
  2. Check that the power supply meets the DC and AC requirements in the Recommended Operating Conditions.
  3. Select the proper pull-high or pull-low resistors for IN_OUT_SEL and OUT_CTRL for setting the signal path.
  4. If -6 dB launch amplitude or other expanded programmable features are needed, select the use of SPI or SMBus by setting the proper pull-high or pull-low resistor for the MODE_SEL pin.
  5. Choose a high quality 75-Ω BNC that is capable to support 2.97 Gbps applications. Consult a BNC supplier regarding insertion loss, impedance specifications, and recommended BNC footprint for meeting SMPTE return loss requirements.
  6. Depending on the length and insertion loss of the output traces for OUT0± and OUT1±, select the proper pull-high or pull-low resistors for VOD_DE to set the output amplitude and de-emphasis settings. Refer to Table 4 for details.
  7. Choose a small 0402 surface mount ceramic capacitors for the AC coupling and bypass capacitors.
  8. Use proper footprint for BNC and AC coupling capacitors. Anti-pads are commonly used in power and VSS planes under these landing pads to achieve optimum return loss.