SBOS710D October   2014  – February 2018 LMH5401

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     Distortion versus Frequency (G = 12 dB, SE-DE, RL = 200 Ω, VPP = 2 V)
  3. 3 Description
    1.     LMH5401 Driving an ADC12J4000
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS = 5 V
    6. 6.6 Electrical Characteristics: VS = 3.3 V
    7. 6.7 Typical Characteristics: 5 V
    8. 6.8 Typical Characteristics: 3.3 V
    9. 6.9 Typical Characteristics: 3.3-V to 5-V Supply Range
  7. 7 Parameter Measurement Information
    1. 7.1  Output Reference Points
    2. 7.2  ATE Testing and DC Measurements
    3. 7.3  Frequency Response
    4. 7.4  S-Parameters
    5. 7.5  Frequency Response with Capacitive Load
    6. 7.6  Distortion
    7. 7.7  Noise Figure
    8. 7.8  Pulse Response, Slew Rate, and Overdrive Recovery
    9. 7.9  Power Down
    10. 7.10 VCM Frequency Response
    11. 7.11 Test Schematics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fully-Differential Amplifier
        1. 8.3.1.1 Power Down and Ground Pins
      2. 8.3.2 Operations for Single-Ended to Differential Signals
        1. 8.3.2.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 8.3.2.2 DC-Coupled Input Signal Path Considerations for SE-DE Conversions
        3. 8.3.2.3 Resistor Design Equations for Single-to-Differential Applications
        4. 8.3.2.4 Input Impedance Calculations
      3. 8.3.3 Differential-to-Differential Signals
        1. 8.3.3.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
        2. 8.3.3.2 DC-Coupled, Differential-Input to Differential-Output Design Issues
      4. 8.3.4 Output Common-Mode Voltage
      5. 8.3.5 LMH5401 Comparison
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With a Split Supply
      2. 8.4.2 Operation With a Single Supply
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Stability
      2. 9.1.2 Input and Output Headroom Considerations
      3. 9.1.3 Noise Analysis
      4. 9.1.4 Noise Figure
      5. 9.1.5 Thermal Considerations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Driving Matched Loads
        2. 9.2.2.2 Driving Unmatched Loads For Lower Loss
        3. 9.2.2.3 Driving Capacitive Loads
        4. 9.2.2.4 Driving ADCs
          1. 9.2.2.4.1 SNR Considerations
          2. 9.2.2.4.2 SFDR Considerations
          3. 9.2.2.4.3 ADC Input Common-Mode Voltage Considerations : AC-Coupled Input
          4. 9.2.2.4.4 ADC Input Common-Mode Voltage Considerations : DC-Coupled Input
        5. 9.2.2.5 GSPS ADC Driver
        6. 9.2.2.6 Common-Mode Voltage Correction
        7. 9.2.2.7 Active Balun
      3. 9.2.3 Application Curves
    3. 9.3 Do's and Don'ts
      1. 9.3.1 Do:
      2. 9.3.2 Don't:
  10. 10Power Supply Recommendations
    1. 10.1 Supply Voltage
    2. 10.2 Single-Supply
    3. 10.3 Split-Supply
    4. 10.4 Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics: VS = 5 V

at TA = 25°C, VS+ = 2.5 V, VS– = –2.5 V, VCM = 0 V, RL = 200-Ω differential, G = 12 dB (4 V/V), single-ended input, differential output, and RS = 50 Ω, (unless otherwise noted)(1)
PARAMETERTEST CONDITIONSMINTYPMAXUNITTEST LEVEL(2)
AC PERFORMANCE
GBP Gain bandwidth product G = 30 dB (32 V/V) 8 GHz C
SSBW Small-signal, –3-dB bandwidth VO = 200 mVPP 6.2 GHz C
LSBW Large-signal, –3-dB bandwidth VO = 2 VPP 4.8 GHz C
Bandwidth for 0.1-dB flatness VO = 2 VPP 800 MHz C
SR Slew rate 2-V step 17500 V/µs C
Rise and fall time 1-V step, 10% to 90% 80 ps C
Overdrive recovery Overdrive = ±0.5 V 300 ps C
Output balance error f = 1 GHz 47 dBc C
zo Output impedance At DC, differential 16 20 24 Ω A
0.1% settling time 2 V, RL = 200 Ω 1 ns C
HD2 Second-order harmonic distortion f = 100 MHz, VO = 2 VPP –99 dBc C
f = 200 MHz, VO = 2 VPP –92 dBc C
f = 500 MHz, VO = 2 VPP –75 dBc C
f = 1 GHz, VO = 2 VPP –56 dBc C
HD3 Third-order harmonic distortion f = 100 MHz, VO = 2 VPP –94 dBc C
f = 200 MHz, VO = 2 VPP –90 dBc C
f = 500 MHz, VO = 2 VPP –75 dBc C
f = 1 GHz, VO = 2 VPP –58 dBc C
IMD3 Third-order intermodulation f = 100 MHz, VO = 1 VPP per tone –95 dBc C
f = 200 MHz, VO = 1 VPP per tone –91 dBc C
f = 500 MHz, VO = 1 VPP per tone –75 dBc C
f = 1 GHz, VO = 1 VPP per tone –60 dBc C
IMD2 Second-order intermodulation f = 100 MHz, VO = 1 VPP per tone –95 dBc C
f = 200 MHz, VO = 1 VPP per tone –89 dBc C
f = 500 MHz, VO = 1 VPP per tone –71 dBc C
f = 1 GHz, VO = 1 VPP per tone –52 dBc C
NOISE PERFORMANCE
en Input voltage noise density 1.25 nV/√Hz C
in Input noise current 3.5 pA/√Hz C
NF Noise figure RS = 50 Ω, SE-DE, 200 MHz
(see Figure 59)		 9.6 dB C
INPUT
VOS Input offset voltage ±0.5 ±5 mV A
IB Input bias current 70 150 µA A
IOS Input offset current ±1 ±10 µA A
Differential resistance Open-loop 4600 Ω C
VICL Input common-mode
low voltage		 VS– (VS–) + 0.41 V A
VICH Input common-mode
high voltage 		(VS+) – 1.41 (VS+) – 1.2 V A
CMRR Common-mode rejection ratio Differential, 1-VPP input shift, DC 72 dBc C
OUTPUT
VOCRH Output voltage range, high Measured
single-ended		 TA = 25°C (VS+) – 1.3 (VS+) – 1.1 V A
TA = –40°C to +85°C (VS+) – 1.2 V C
VOCRL Output voltage range, low Measured
single-ended		 TA = 25°C (VS–) + 1.3 (VS–) + 1.1 V A
TA = –40°C to +85°C (VS–) + 1.2 V C
VOD Differential output voltage swing Differential 5.8 VPP C
IOD Differential output current VO = 0 V(3) 40 50 mA A
POWER SUPPLY
VS Supply voltage 3.15 5.25 V A
PSRR Power-supply rejection ratio VS– –50 –80 dB A
VS+ –60 –82 dB A
IQ Quiescent current Power down = 0 50 55 62 mA A
Power down = 1 1 3 6 mA A
OUTPUT COMMON-MODE CONTROL PIN (VCM)
SSBW Small-signal bandwidth VOCM = 100 mVPP 1.2 GHz C
VCM slew rate VOCM = 500 mVPP 2900 V/µs C
VCM voltage range low Differential gain shift < 1 dB (VS–) + 1.4 (VS–) + 2 V A
VCM voltage range high Differential gain shift < 1 dB (VS+) – 2 (VS+) – 1.4 V A
VCM gain VCM = 0 V 0.98 1 1.01 V/V A
VOCM output common-mode offset from VCM input voltage VCM = 0 V –27 mV C
VOCM Common-mode offset voltage Output-referred 0.4 mV A
POWER DOWN (PD PIN)
VT Enable or disable voltage threshold Device powers on below 0.8 V
Device powers down above 1.2 V		 0.9 1.1 1.2 V A
Power down quiescent current 1 3 6 mA A
Power down bias current Power down = 2.5 V 10 ±100 µA C
Turnon time delay Time to VO = 90% of final value 10 ns C
Turnoff time delay Time to VO = 10% of original value 10 ns C
(1) The input resistance and corresponding gain are obtained with the external resistance added.
(2) Test levels: (A) 100% tested at 25°C. Overtemperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information.
(3) This test shorts the outputs to ground (midsupply) then sources or sinks 60 mA and measures the deviation from the initial condition.