SNOSAQ2F July   2005  – August 2024 LMH6702QML-SP

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Quality Conformance Inspection
    4. 5.4 Electrical Characteristics: DC Parameters
    5. 5.5 Electrical Characteristics: AC Parameters
    6. 5.6 Electrical Characteristics: Drift Values Parameters
    7. 5.7 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Feedback Resistor
      2. 6.1.2 Harmonic Distortion
      3. 6.1.3 Capacitive Load Drive
      4. 6.1.4 DC Accuracy and Noise
    2. 6.2 Layout
      1. 6.2.1 Layout Guidelines
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • NAB|8
  • NAC|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.1.4 DC Accuracy and Noise

Example below shows the output offset computation equation for the noninverting configuration using the typical bias current and offset specifications for AV = +2:

Output Offset: VO = (±IBN × RIN ± VIO) (1 + RF/RG) ± IBI × RF

Where RIN is the equivalent input impedance on the noninverting input.

Example computation for AV = +2, RF = 237Ω, RIN = 25Ω:

VO = (±6μA × 25Ω ± 1mV) (1 + 237/237) ± 8μA × 237 = ±4.20mV

A good design, however, includes a worst-case calculation using minimum and maximum numbers in the data sheet tables to provide worst-case operation.

Further improvement in the output offset voltage and drift is possible using composite amplifiers. The two input bias currents are physically unrelated in both magnitude and polarity for the current feedback topology. Therefore, to cancel the effects by matching the source impedance for the two inputs (as is commonly done for matched input bias current devices) is not possible.

The total output noise is computed in a similar fashion to the output offset voltage. Using the input noise voltage and the two input noise currents, the output noise is developed through the same gain equations for each term but combined as the square root of the sum of squared contributing elements. See the OA-12 Noise Analysis for Comlinear Amplifiers application report for a full discussion of noise calculations for current-feedback amplifiers.