SNAS855D November   2023  – June 2024 LMKDB1102 , LMKDB1104 , LMKDB1108 , LMKDB1120 , LMKDB1202 , LMKDB1204

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SMBus Timing Requirements
    7. 6.7 SBI Timing Requirements
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Features
        1. 8.3.1.1 Running Input Clocks When Device is Powered Off
        2. 8.3.1.2 Fail-Safe Inputs
        3. 8.3.1.3 Input Configurations
          1. 8.3.1.3.1 Internal Termination for Clock Inputs
          2. 8.3.1.3.2 AC-Coupled or DC-Coupled Clock Inputs
      2. 8.3.2 Flexible Power Sequence
        1. 8.3.2.1 PWRDN# Assertion and Deassertion
        2. 8.3.2.2 OE# Assertion and Deassertion
        3. 8.3.2.3 PWRGD Assertion
        4. 8.3.2.4 Clock Input and PWRGD/PWRDN# Behaviors When Device Power is Off
      3. 8.3.3 LOS and OE
        1. 8.3.3.1 Additional OE# Pins for LMKDB1120 and Backward Compatibility
        2. 8.3.3.2 Synchronous OE
        3. 8.3.3.3 OE Control
        4. 8.3.3.4 Automatic Output Disable
        5. 8.3.3.5 LOS Detection
      4. 8.3.4 Output Features
        1. 8.3.4.1 Output Banks
        2. 8.3.4.2 Double Termination
        3. 8.3.4.3 Programmable Output Slew Rate
          1. 8.3.4.3.1 Slew Rate Control through Pin
          2. 8.3.4.3.2 Slew Rate Control through SMBus
        4. 8.3.4.4 Programmable Output Swing
        5. 8.3.4.5 Accurate Output Impedance
        6. 8.3.4.6 Programmable Output Impedance
    4. 8.4 Device Functional Modes
      1. 8.4.1 SMBus Mode
      2. 8.4.2 SBI Mode
      3. 8.4.3 Pin Mode
  10. 9 Register Maps
    1. 9.1 LMKDB1120 Registers
    2. 9.2 LMKDB1108 Registers
    3. 9.3 LMKDB1104 Registers
    4. 9.4 LMKDB1204 Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12 Revision History

Changes from Revision C (May 2024) to Revision D (June 2024)

  • Updated the number format for tables, figures, and cross-references throughout the documentGo
  • Updated R17 register 7:4 name to “AMP” to match GUI name for LMKDB1108:Go
  • Updated R18 table to stack Reserved bits 5:4 in one row for LMKDB1108Go
  • Exposed registers R5 to change REV_ID for LMKDB1108Go
  • Exposed R91 and R92 to show output slew rate control for LMKDB1108Go
  • Corrected register names that control correct outputs of chip (R0, R1, R2, R3, R20, R21) for LMKDB1204Go
  • Updated ^vSADR1_tri to ^vSADR0_tri for pin 4 in Figure 5-2 Go
  • Updated pin 7 name and description from "VDD" to "VDDA" in Figure 5-2.Go
  • Updated pin 10 name and description from "VDDA" to "VDD" in Figure 5-2 Go
  • Updated functional block diagram Figure 8-2 to fix HW_SW_CTRL pin naming to SMB_EN. Changed the structure of functional block diagramGo
  • Updated functional block diagram Figure 8-2 to fix HW_SW_CTRL pin naming to SMB_ENGo
  • Changed the structure of functional block diagramGo
  • Added pin mode description in the Section 8.3.4.3section.Go
  • Added layout examples for LMDB1102, LMKDB1202, LMKDB1104, LMKD1204 and LMKDB1108.Go

Changes from Revision B (February 2024) to Revision C (May 2024)

Changes from Revision A (December 2023) to Revision B (February 2024)

  • Updated the number format for tables, figures, and cross-references throughout the documentGo
  • Added additional explanations for recommended PWRDN# assertion/deassertion sequences and effects when not followed properly in the PWRDN# Assertion and Deassertion sectionGo

Changes from Revision * (November 2023) to Revision A (December 2023)

  • Updated the number format for tables, figures, and cross-references throughout the documentGo