SNVS817B June   2012  – June 2019 LMR12015 , LMR12020

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Circuit
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Descriptions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Ratings
    3. 6.3 Electrical Characteristics
    4. 6.4 Typical Performance Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Boost Function
      2. 7.3.2  Low Input Voltage Considerations
      3. 7.3.3  High Output Voltage Considerations
      4. 7.3.4  Frequency Synchronization
      5. 7.3.5  Current Limit
      6. 7.3.6  Frequency Foldback
      7. 7.3.7  Soft Start
      8. 7.3.8  Output Overvoltage Protection
      9. 7.3.9  Undervoltage Lockout
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Operation Modes
      1. 7.4.1 Enable Pin / Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1  Custom Design With WEBENCH® Tools
        2. 8.2.1.2  Inductor Selection
          1. 8.2.1.2.1 Inductor Calculation Example
          2. 8.2.1.2.2 Inductor Material Selection
        3. 8.2.1.3  Input Capacitor
        4. 8.2.1.4  Output Capacitor
        5. 8.2.1.5  Catch Diode
        6. 8.2.1.6  Boost Diode (Optional)
        7. 8.2.1.7  Boost Capacitor
        8. 8.2.1.8  Output Voltage
        9. 8.2.1.9  Feedforward Capacitor (Optional)
        10. 8.2.1.10 Calculating Efficiency and Junction Temperature
          1. 8.2.1.10.1 Schottky Diode Conduction Losses
          2. 8.2.1.10.2 Inductor Conduction Losses
          3. 8.2.1.10.3 MOSFET Conduction Losses
          4. 8.2.1.10.4 MOSFET Switching Losses
          5. 8.2.1.10.5 IC Quiescent Losses
          6. 8.2.1.10.6 MOSFET Driver Losses
          7. 8.2.1.10.7 Total Power Losses
          8. 8.2.1.10.8 Efficiency Calculation Example
          9. 8.2.1.10.9 Calculating the LMR2015/20 Junction Temperature
      2. 8.2.2 Application Curves
      3. 8.2.3 LMR12015/20 Circuit Examples
  9. 9 Layout
    1. 9.1 Layout Considerations
      1. 9.1.1 Compact Layout
      2. 9.1.2 Ground Plane and Shape Routing
      3. 9.1.3 FB Loop
      4. 9.1.4 PCB Summary
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Related Links
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Community Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1.10.9 Calculating the LMR2015/20 Junction Temperature

Thermal Definitions:

TJ = IC junction temperature

TA = Ambient temperature

RθJC = Thermal resistance from IC junction to device case

RθJA = Thermal resistance from IC junction to ambient air

LMR12015 LMR12020 30197066.pngFigure 30. Cross-Sectional View Of Integrated Circuit Mounted On A Printed Circuit Board.

Heat in the LMR12015/20 due to internal power dissipation is removed through conduction and/or convection.

Conduction: Heat transfer occurs through cross sectional areas of material. Depending on the material, the transfer of heat can be considered to have poor to good thermal conductivity properties (insulator vs conductor).

Heat Transfer goes as:

Equation 59. Silicon→Lead Frame→PCB

Convection: Heat transfer is by means of airflow. This could be from a fan or natural convection. Natural convection occurs when air currents rise from the hot device to cooler air.

Thermal impedance is defined as:

Equation 60. LMR12015 LMR12020 30197067.gif

Thermal impedance from the silicon junction to the ambient air is defined as:

Equation 61. LMR12015 LMR12020 30197068.gif

This impedance can vary depending on the thermal properties of the PCB. This includes PCB size, weight of copper used to route traces , the ground plane, and the number of layers within the PCB. The type and number of thermal vias can also make a large difference in the thermal impedance. Thermal vias are necessary in most applications. They conduct heat from the surface of the PCB to the ground plane. Six to nine thermal vias should be placed under the exposed pad to the ground plane. Placing more than nine thermal vias results in only a small reduction to RθJA for the same copper area. These vias should have 8 mil holes to avoid wicking solder away from the DAP. See AN-1187 Leadless Leadframe Package (LLP)and AN-1520 A Guide to Board Layout for Best Thermal Resistance for Exposed Packages for more information on package thermal performance.

To predict the silicon junction temperature for a given application, three methods can be used. The first is useful before prototyping and the other two can more accurately predict the junction temperature within the application.

Method 1:

The first method predicts the junction temperature by extrapolating a best guess RθJA from the table or graph. The tables and graph are for natural convection. The internal dissipation can be calculated using the efficiency calculations. This allows the user to make a rough prediction of the junction temperature in their application. Methods two and three can later be used to determine the junction temperature more accurately.

The table below has values of RθJA for the WSON package.

Table 2. RθJAValues for the WSON at 1-Watt Dissipation:

NUMBER OF BOARD LAYERS SIZE OF BOTTOM LAYER COPPER CONNECTED TO DAP SIZE OF TOP LAYER COPPER CONNECTED TO DAP NUMBER OF 8 MIL THERMAL VIAS RθJA
2 0.25 in2 0.05 in2 8 78°C/W
2 0.5625 in2 0.05 in2 8 65.6°C/W
2 1 in2 0.05 in2 8 58.6°C/W
2 1.3225 in2 0.05 in2 8 50°C/W
4 (Eval Board) 3.25 in2 2.25 in2 15 30.7°C/W
LMR12015 LMR12020 30197090.pngFigure 31. Estimate of Thermal Resistance vs. Ground Copper Area
Eight Thermal Vias and Natural Convection

Method 2:

The second method requires the user to know the thermal impedance of the silicon junction to case. (RθJC) is approximately 9.1°C/W for the WSON. The case temperature should be measured on the bottom of the PCB at a thermal via directly under the DAP of the LMR12015/20. The solder resist must be removed from this area for temperature testing. The reading will be more accurate if it is taken midway between pins 2 and 9, where the NMOS switch is located. Knowing the internal dissipation from the efficiency calculation given previously, and the case temperature (TC) we have:

Equation 62. LMR12015 LMR12020 30197069.gif

Therefore:

Equation 63. TJ = (RθJC × PLOSS) + TC