SNAS877 December   2024 LMR60440

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Undervoltage Lockout (UVLO)
      2. 7.3.2 Soft Start and Recovery from Dropout
      3. 7.3.3 Frequency Selection With RT
      4. 7.3.4 MODE/SYNC Pin Control
      5. 7.3.5 Output Voltage Selection
      6. 7.3.6 Current Limit
      7. 7.3.7 Hiccup Mode
      8. 7.3.8 Power-Good Function
      9. 7.3.9 Spread Spectrum
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
      2. 7.4.2 Active Mode
        1. 7.4.2.1 Continuous Conduction Mode (CCM)
        2. 7.4.2.2 Auto Mode - Light Load Operation
        3. 7.4.2.3 FPWM Operation - Light Load Operation
        4. 7.4.2.4 Minimum On-Time
        5. 7.4.2.5 Dropout
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency Selection
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Bootstrap Capacitor (CBOOT) Selection
        6. 8.2.2.6 FB Voltage Divider for Adjustable Output Voltages
          1. 8.2.2.6.1 Feedforward Capacitor (CFF) Selection
        7. 8.2.2.7 RPG - PG Pullup Resistor
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Ground and Thermal Plane Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

MODE/SYNC Pin Control

The MODE/SYNC pin of the LMR60440 is an input pin used to select the mode of operation of the device or to synchronize the switching frequency to an external clock frequency. In the absence of an external clock, the RT resistor determines the switching frequency. Do not float the MODE/SYNC pin. If this pin is driven by a high impedance source, connect a pull up or pull down resistor to prevent this pin from floating. For more information on the modes of operation, refer to Section 7.4.

The MODE/SYNC pin can be used to dynamically change the mode of operation for systems that require more than a single mode of operation. There are three selectable modes of operation:

  • AUTO mode: pulse frequency modulation (PFM) operation is enabled during light load and diode emulation prevents reverse current through the inductor. See Section 7.4.2.2 for more details.
  • FPWM mode: in FPWM mode, diode emulation is disabled if the input voltage is less than VINOVP(R), allowing current to flow backwards through the inductor. This allows operation at full frequency even without load current. See Section 7.4.2.3 for more details.
  • SYNC mode: the internal clock aligns to an external signal applied to the MODE/SYNC pin. The frequency of the external clock signal must be equal to or greater than the frequency set by the RT resistor. The high level of the external clock must be greater than or equal to VIH_CLK, and the low level of the external clock must be less than or equal to VIL_CLK. The external clock must not exceed the MODE/SYNC pin rating provided in Section 6.1. As long as output voltage can be regulated at full frequency and is not limited by minimum off time or minimum on time, the clock frequency is matched to the frequency of the signal applied to the MODE/SYNC pin. While the device is in SYNC mode, the device operates as though in FPWM mode. Diode emulation is disabled, allowing the frequency applied to the MODE/SYNC pin to be matched without a load.

To dynamically change between modes of operation, a valid sync signal must be applied. Table 7-1 shows a summary of the pulse dependent mode selection settings.

Table 7-1 Pulse-Dependent Mode Selection Settings
MODE/SYNC INPUT MODE
> VIH_FPWM FPWM with spread spectrum factory setting
< VIL_FPWM AUTO mode with spread spectrum factory setting
Synchronization clock SYNC MODE

If dynamically switching between modes of operation is not needed, this pin can be held at a constant voltage resulting in a fixed mode of operation. For auto mode, this pin can be short circuited to PGND or pulled below VIL_FPWM. For FPWM mode, this pin can be short circuited to the RT pin or pulled up to VIH_FPWM with an external voltage source. See Section 6.5 for details.