SNVS659I March 2011 – August 2015 LMZ23605
PRODUCTION DATA.
PCB layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce and resistive voltage drop in the traces. These can send erroneous signals to the DC-DC converter resulting in poor regulation or instability. Good layout can be implemented by following a few simple design rules.
From an EMI reduction standpoint, it is imperative to minimize the high di/dt paths during PCB layout as shown in the figure above. The high current loops that do not overlap have high di/dt content that will cause observable high frequency noise on the output pin if the input capacitor (CIN1) is placed at a distance away from the LMZ23605. Therefore place CIN1 as close as possible to the LMZ23605 VIN and PGND exposed pad. This will minimize the high di/dt area and reduce radiated EMI. Additionally, grounding for both the input and output capacitor must consist of a localized top side plane that connects to the PGND exposed pad (EP).
The ground connections for the feedback, soft-start, and enable components must be routed to the AGND pin of the device. This prevents any switched or load currents from flowing in the analog ground traces. If not properly handled, poor grounding can result in degraded load regulation or erratic output voltage ripple behavior. Additionally provide the single point ground connection from pin 4 (AGND) to EP/PGND.
Both feedback resistors, RFBT and RFBB must be located close to the FB pin. Since the FB node is high impedance, maintain the copper area as small as possible. The traces from RFBT, RFBB must be routed away from the body of the LMZ23605 to minimize possible noise pickup.
This reduces any voltage drops on the input or output of the converter and maximizes efficiency. To optimize voltage accuracy at the load, ensure that a separate feedback voltage sense trace is made to the load. Doing so will correct for voltage drops and provide optimum output accuracy.
Use an array of heat-sinking vias to connect the exposed pad to the ground plane on the bottom PCB layer. If the PCB has a plurality of copper layers, these thermal vias can also be employed to make connection to inner layer heat-spreading ground planes. For best results use a 6 × 10 via array with a minimum via diameter of 8 mils thermal vias spaced 39 mils (1.0 mm). Ensure enough copper area is used for heat-sinking to keep the junction temperature below 125°C.
When calculating module dissipation use the maximum input voltage and the average output current for the application. Many common operating conditions are provided in the characteristic curves such that less common applications can be derived through interpolation. In all designs, the junction temperature must be kept below the rated maximum of 125°C.
For the design case of VIN = 24 V, VO = 3.3 V, IO = 5 A, and TAMB(MAX) = 85°C, the module must see a thermal resistance from case to ambient of less than:
Given the typical thermal resistance from junction to case to be 1.9°C/W. Use the 85°C power dissipation curves in the Typical Characteristics section to estimate the PIC-LOSS for the application being designed. In this application it is 5.5 W.
NOTE
For package dissipations above 5-W air flow or external heat sinking may be required.
To reach RθCA = 5.37, the PCB is required to dissipate heat effectively. With no airflow and no external heat-sink, a good estimate of the required board area covered by 2-oz. copper on both the top and bottom metal layers is:
As a result, approximately 93 square cm of 2-oz. copper on top and bottom layers is required for the PCB design. The PCB copper heat sink must be connected to the exposed pad. Approximately sixty, 8 mil thermal vias spaced 39 mils (1.0 mm) apart connect the top copper to the bottom copper. For an example of a high thermal performance PCB layout for SIMPLE SWITCHER power modules, refer to SNVA457, SNVA473, SNVA419 and SNVA424.
The recommendations below are for a standard module surface mount assembly
PROBE | MAX TEMP (°C) | REACHED MAX TEMP | TIME ABOVE 235°C | REACHED 235°C | TIME ABOVE 245°C | REACHED 245°C | TIME ABOVE 260°C | REACHED 260°C |
---|---|---|---|---|---|---|---|---|
1 | 242.5 | 6.58 | 0.49 | 6.39 | 0.00 | – | 0.00 | – |
2 | 242.5 | 7.10 | 0.55 | 6.31 | 0.00 | 7.10 | 0.00 | – |
3 | 241.0 | 7.09 | 0.42 | 6.44 | 0.00 | – | 0.00 | – |