SNVS256E November   2003  – October 2024 LP3943

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
    1.     Pin Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface (SCL and SDA Pins) Timing Requirements
    7. 5.7 Typical Characteristic
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
    5. 6.5 Programming
      1. 6.5.1 I2C Data Validity
      2. 6.5.2 I2C START and STOP Conditions
      3. 6.5.3 Transferring Data
      4. 6.5.4 Auto Increment
    6. 6.6 Register Maps
      1. 6.6.1 Binary Format for Input Registers (Read-only)—Address 0x00 and 0x01
      2. 6.6.2 Binary Format for Frequency Prescaler and PWM Registers — Address 0x02 to 0x05
      3. 6.6.3 Binary Format for Selector Registers — Address 0x06 to 0x09
  8.   Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Reducing IQ When LEDs are OFF
      3. 7.2.3 Application Curve
    3. 7.3 System Examples
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Community Resources
    3. 7.3 Trademarks
  10. 8Revision History
  11.   Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5.2 I2C START and STOP Conditions

START and STOP bits classify the beginning and the end of the I2C session. START condition is defined as SDA signal transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and STOP bits. The I2C bus is considered to be busy after START condition and free after STOP condition. During data transmission, I2C master can generate repeated START conditions. First START and repeated START conditions are equivalent, function-wise.

LP3943 I2C START and STOP ConditionsFigure 6-2 I2C START and STOP Conditions