SNVSC36 December 2021 LP5866
PRODUCTION DATA
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
MISC. Timming Requirements | |||||
fOSC | Internal oscillator frequency | 31.2 | MHz | ||
fOSC _ERR | Device to device oscillator frequency error | –3% | 3% | ||
tPOR_H | Wait time from UVLO disactive to device NORMAL | 500 | µs | ||
tCHIP_EN | Wait time from setting Chip_EN (Register) =1 to device NORMAL | 100 | µs | ||
tRISE | LED output rise time | 10 | ns | ||
tFALL | LED output fall time | 15 | ns | ||
tVSYNC_H | The minimum high-level pulse width of VSYNC | 200 | µs | ||
SPI timing requirements | |||||
fSCLK | SPI Clock frequency | 12 | MHz | ||
1 | Cycle time | 83.3 | ns | ||
2 | SS active lead-time | 50 | ns | ||
3 | SS active leg time | 50 | ns | ||
4 | SS inactive time | 50 | ns | ||
5 | SCLK low time | 36 | ns | ||
6 | SCLK high time | 36 | ns | ||
7 | MOSI set-up time | 20 | ns | ||
8 | MOSI hold time | 20 | ns | ||
9 | MISO disable time | 30 | ns | ||
10 | MISO data valid time | 35 | ns | ||
Cb | Bus capacitance | 5 | 40 | pF | |
I2C fast mode timing requirements | |||||
fSCL | I2C clock frequency | 0 | 400 | KHz | |
1 | Hold time (repeated) START condition | 600 | ns | ||
2 | Clock low time | 1300 | ns | ||
3 | Clock high time | 600 | ns | ||
4 | Setup time for a repeated START condition | 600 | ns | ||
5 | Data hold time | 0 | ns | ||
6 | Data setup time | 100 | ns | ||
7 | Rise time of SDA and SCL | 300 | ns | ||
8 | Fall time of SDA and SCL | 300 | ns | ||
9 | Setup time for STOP condition | 600 | ns | ||
10 | Bus free time between a STOP and a START condition | 1.3 | µs | ||
I2C fast mode plus timing requirements | |||||
fSCL | I2C clock frequency | 0 | 400 | KHz | |
1 | Hold time (repeated) START condition | 600 | ns | ||
2 | Clock low time | 1300 | ns | ||
3 | Clock high time | 600 | ns | ||
4 | Setup time for a repeated START condition | 600 | ns | ||
5 | Data hold time | 0 | ns | ||
6 | Data setup time | 100 | ns | ||
7 | Rise time of SDA and SCL | 300 | ns | ||
8 | Fall time of SDA and SCL | 300 | ns | ||
9 | Setup time for STOP condition | 600 | ns | ||
10 | Bus free time between a STOP and a START condition | 1.3 | µs |