SLVSHF3 October   2024 LP5899-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Oscillator and Clocks
        1. 7.3.1.1 System Clock
        2. 7.3.1.2 Continuous Clock Serial Interface (CCSI) Clock
      2. 7.3.2 Continuous Clock Serial Interface (CCSI)
        1. 7.3.2.1 Command Format
        2. 7.3.2.2 Command Recognition and Synchronization
        3. 7.3.2.3 CCSI Command Queue
        4. 7.3.2.4 CCSI Start Bit and Check Bits Insertion and Removal
      3. 7.3.3 FIFO
        1. 7.3.3.1 FIFO level and Data Ready (DRDY) Interrupt
        2. 7.3.3.2 FIFO Clearance
      4. 7.3.4 Diagnostics
        1. 7.3.4.1  Undervoltage Lockout
        2. 7.3.4.2  Oscillator Fault Diagnostics
        3. 7.3.4.3  SPI Communications Loss
        4. 7.3.4.4  SPI Communications Error
          1. 7.3.4.4.1 Reset Timer
          2. 7.3.4.4.2 Chip Select (CS) Reset
          3. 7.3.4.4.3 CRC Error
          4. 7.3.4.4.4 Register write failure
        5. 7.3.4.5  CCSI Communications Loss
          1. 7.3.4.5.1 SIN Stuck-at Diagnostics
        6. 7.3.4.6  CCSI Communications Error
          1. 7.3.4.6.1 CHECK Bit Error
          2. 7.3.4.6.2 Data Integrity Diagnostics
          3. 7.3.4.6.3 CCSI Command Queue Overflow
        7. 7.3.4.7  FIFO Diagnostics
          1. 7.3.4.7.1 TXFIFO Overflow
          2. 7.3.4.7.2 TXFIFO Underflow
          3. 7.3.4.7.3 TXFIFO Single Error Detection (SED)
          4. 7.3.4.7.4 RXFIFO Overflow
          5. 7.3.4.7.5 RXFIFO Underflow
          6. 7.3.4.7.6 RXFIFO Single Error Detection (SED)
        8. 7.3.4.8  OTP CRC Error
        9. 7.3.4.9  Fault Masking
        10. 7.3.4.10 Diagnostics Table
    4. 7.4 Device Functional Modes
      1. 7.4.1 Unpowered
      2. 7.4.2 Initialization State
      3. 7.4.3 Normal State
      4. 7.4.4 Failsafe State
    5. 7.5 Programming
      1. 7.5.1 SPI Data Validity
      2. 7.5.2 Chip Select (CS) and SPI Reset Control
      3. 7.5.3 SPI Command Format
      4. 7.5.4 SPI Command Detail
    6. 7.6 Device Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Programming Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5.4 SPI Command Detail

For each command except SOFTRESET_CRC there are two versions. The version without CRC at the end of the type name is always executed even when the CRC value is incorrect. The version with CRC at the end of the type name is only executed when the CRC that is received matches the calculated CRC over the command word and data words.

The commands starting with FWD, forward the received data words by the CCSI controller. As long as the data length is larger than 0, the CCSI controller automatically inserts one start bit, the check bits, and one END byte. The SPI data words of one SPI command are therefore considered to be one CCSI command with 1 start bit before the first SPI data word, a check bit after every data word, and one END byte after the last SPI data word.

Commands starting with REG are used to write and read the register of the LP5899-Q1 device. The DATA_RD commands return the data stored on the RXFIFO.

Commands starting with FWD, REG_WR, and SOFTRESET_CRC return the STATUS register and the CRC calculated over the STATUS register. This acknowledgement can be disabled by bit SPI_ACK_DIS in the SPICTRL register. Care has to be taken when executing SOFTRESET_CRC while the acknowledgement is disabled. In this case, TI recommends to wait at least one SPI word before sending the next command.

Whenever the LP5899-Q1 device returns data to the controller on the SDO pin, the controller has to provide sufficient clock pulses on the SCLK pin to shift out the data. TI recommends to keep the SDI pin at logic HIGH while providing the clock pulses to shift out the data.

FWD_WR_CRC (Forward Write CRC command)

Return to the SPI Command Table

The FWD_WR_CRC command is used to transmit data words by the CCSI controller in the device. All the data words received by the SPI peripheral are stored on the TXFIFO. Only when the received CRC matches with the calculated CRC over the command word and data words, the CCSI controller starts to transmit. This means that the TXFFLVL does not impact the start of this transmission. Caution has to be taken by the SPI controller that the data length is less than the size of the TXFIFO. This SPI command supports up to 512 data words and returns the STATUS register and the CRC calculated over the STATUS register. An example of FWD_WR_CRC command forwarding 2 data words is depicted in Figure 7-10.

LP5899-Q1 Example of FWD_WR_CRC command Figure 7-10 Example of FWD_WR_CRC command

FWD_WR (Forward Write command)

Return to the SPI Command Table

The FWD_WR command is used to transmit data words by the CCSI controller in the device. All the data words received by the SPI peripheral are stored on the TXFIFO. If one or more of the following conditions is met, the CCSI controller starts transmitting.

  • The number of words stored on the TXFIFO reach TXFFLVL
  • All the data words of the SPI command have been received
This means that the CRC does not impact the start of this transmission. When the received CRC does not match the calculated CRC over the command word and data words, the FAULT pin is pulled low (when not masked) and the flag FLAG_SPI_CRC is set. This SPI command supports up to 4096 data words and returns the STATUS register and the CRC calculated over the STATUS register. An example of FWD_WR command forwarding 3 words with TXFFLVL set to 2 data words is depicted in Figure 7-11.

LP5899-Q1 Example of FWD_WR command Figure 7-11 Example of FWD_WR command

FWD_WR_END_CRC (Forward Write CRC with END bytes command)

Return to the SPI Command Table

The FWD_WR_END_CRC command is used to transmit data words by the CCSI controller in the device. All the data words received by the SPI peripheral are stored on the TXFIFO. Only when the received CRC matches with the calculated CRC over the command word and data words, the CCSI controller starts to transmit. This means that the TXFFLVL does not impact the start of this transmission. After all the data words have been transmitted by the CCSI controller, the specified number of extra END bytes are appended. The transmission of data words and the transmission of the extra END bytes are considered as 2 separate CCSI commands. This SPI command supports up to 31 data words and returns the STATUS register and the CRC calculated over the STATUS register. An example of FWD_WR_END_CRC command forwarding 0 data words (and therefore does not insert one END byte) and 3 extra END bytes is depicted in Figure 7-12.

LP5899-Q1 Example of FWD_WR_END_CRC command Figure 7-12 Example of FWD_WR_END_CRC command

FWD_WR_END (Forward Write with END bytes command)

Return to the SPI Command Table

The FWD_WR_END command is used to transmit data words by the CCSI controller in the device. All the data words received by the SPI peripheral are stored on the TXFIFO. If one or more of the following conditions is met, the CCSI controller starts transmitting.

  • The number of words stored on the TXFIFO reach TXFFLVL
  • All the data words of the SPI command have been received
This means that the CRC does not impact the start of this transmission. When the received CRC does not match the calculated CRC over the command word and data words, the FAULT pin is pulled low (when not masked) and the flag FLAG_SPI_CRC is set. After all the data words have been transmitted by the CCSI controller, the specified number of extra END bytes are appended. The transmission of data words and the transmission of the extra END bytes are considered as 2 separate CCSI commands. This SPI command supports up to 31 data words and returns the STATUS register and the CRC calculated over the STATUS register. An example of FWD_WR_END command forwarding 2 data words and 1 extra END bytes is depicted in Figure 7-13. Note that in this example the TXFFLVL is set to 2 words or higher.

LP5899-Q1 Example of FWD_WR_END command Figure 7-13 Example of FWD_WR_END command

FWD_RD_END_CRC (Forward Read CRC with END bytes command)

Return to the SPI Command Table

The FWD_RD_END_CRC command is used to transmit data words by the CCSI controller in the device. All the data words received by the SPI peripheral are stored on the TXFIFO. Only when the received CRC matches with the calculated CRC over the command word and data words, the CCSI controller starts to transmit. This means that the TXFFLVL does not impact the start of this transmission. After all the data words have been transmitted by the CCSI controller, the specified number of extra END bytes are appended. The transmission of data words and the transmission of the extra END bytes are considered as 2 separate CCSI commands. All the data words that are received by the CCSI peripheral for this command are stored on the RXFIFO. This SPI command supports up to 32 data words and returns the STATUS register and the CRC calculated over the STATUS register. An example of FWD_RD_END_CRC command forwarding 2 data words and 1 extra END bytes is depicted in Figure 7-14.

LP5899-Q1 Example of FWD_RD_END_CRC command Figure 7-14 Example of FWD_RD_END_CRC command

FWD_RD_END (Forward Read with END bytes command)

Return to the SPI Command Table

The FWD_RD_END command is used to transmit data words by the CCSI controller in the device. All the data words received by the SPI peripheral are stored on the TXFIFO. If one or more of the following conditions is met, the CCSI controller starts transmitting.

  • The number of words stored on the TXFIFO reach TXFFLVL
  • All the data words of the SPI command have been received
This means that the CRC does not impact the start of this transmission. When the received CRC does not match the calculated CRC over the command word and data words, the FAULT pin is pulled low (when not masked) and the flag FLAG_SPI_CRC is set. After all the data words have been transmitted by the CCSI controller, the specified number of extra END bytes are appended. The transmission of data words and the transmission of the extra END bytes are considered as 2 separate CCSI commands. All the data words that are received by the CCSI peripheral for this command are stored on the RXFIFO. This SPI command supports up to 32 data words and returns the STATUS register and the CRC calculated over the STATUS register. An example of FWD_RD_END command forwarding 3 data words with TXFFLVL set to 2 data words and 2 extra END bytes is depicted in Figure 7-15.

LP5899-Q1 Example of FWD_RD_END command Figure 7-15 Example of FWD_RD_END command

DATA_RD_CRC (Data Read CRC command)

Return to the SPI Command Table

The DATA_RD_CRC command is used to read data words from the RXFIFO. Only when the received CRC matches with the calculated CRC over the command word, the device returns the requested number of data words and the CRC calculated over the data words. When the CRC fails, the SDO is kept at logic HIGH. An example of DATA_RD_CRC command requesting 4 data words is depicted in Figure 7-16.

LP5899-Q1 Example of DATA_RD_CRC command Figure 7-16 Example of DATA_RD_CRC command

DATA_RD (Data Read command)

Return to the SPI Command Table

The DATA_RD command is used to read data words from the RXFIFO. Even when the received CRC does not match with the calculated CRC over the command word, the device returns the requested number of data words and the CRC calculated over the data words. When the received CRC does not match the calculated CRC over the command word, the FAULT pin is pulled low (when not masked) and the flag FLAG_SPI_CRC is set. An example of DATA_RD command requesting 3 data words is depicted in Figure 7-17.

LP5899-Q1 Example of DATA_RD command Figure 7-17 Example of DATA_RD command

REG_WR_CRC (Register Write CRC command)

Return to the SPI Command Table

The REG_WR_CRC command is used to write the internal registers of the LP5899-Q1 device. The command includes a field to indicate the address of the first register to be written. All the data words received by the SPI peripheral are stored in shadow registers. Only when the received CRC matches with the calculated CRC over the command word and data words, the registers are updated. This command returns the STATUS register and the CRC calculated over the STATUS register. An example of REG_WR_CRC command writing 3 registers is depicted in Figure 7-18.

LP5899-Q1 Example of REG_WR_CRC command Figure 7-18 Example of REG_WR_CRC command

REG_WR (Register Write command)

Return to the SPI Command Table

The REG_WR command is used to write the internal registers of the LP5899-Q1 device. The command includes a field to indicate the address of the first register to be written. All the data words received by the SPI peripheral are directly written in registers. This means that the CRC does not impact the writing of registers. When the received CRC does not match the calculated CRC over the command word, the FAULT pin is pulled low (when not masked) and the flag FLAG_SPI_CRC is set. This command returns the STATUS register and the CRC calculated over the STATUS register. An example of REG_WR_CRC command writing 2 registers is depicted in Figure 7-19.

LP5899-Q1 Example of REG_WR command Figure 7-19 Example of REG_WR command

REG_RD_CRC (Register Read CRC command)

Return to the SPI Command Table

The REG_RD_CRC command is used to read the internal registers of the LP5899-Q1 device. The command includes a field to indicate the address of the first register to be read. Only when the received CRC matches with the calculated CRC over the command word, the device returns the requested number of register words and the CRC calculated over the register words. When the CRC fails, the SDO is kept at logic HIGH. An example of REG_RD_CRC command reading 1 register is depicted in Figure 7-20.

LP5899-Q1 Example of REG_RD_CRC command Figure 7-20 Example of REG_RD_CRC command

REG_RD (Register Read command)

Return to the SPI Command Table

The REG_RD command is used to read the internal registers of the LP5899-Q1 device. The command includes a field to indicate the address of the first register to be read. Even when the received CRC does not match with the calculated CRC over the command word, the device returns the requested number of register words and the CRC calculated over the register words. When the received CRC does not match the calculated CRC over the command word, the FAULT pin is pulled low (when not masked) and the flag FLAG_SPI_CRC is set. An example of REG_RD command reading 3 registers is depicted in Figure 7-21.

LP5899-Q1 Example of REG_RD command Figure 7-21 Example of REG_RD command

SOFTRESET_CRC (Softreset CRC command)

Return to the SPI Command Table

The SOFTRESET_CRC command is used to reset all internal registers to the default values and synchronize the CCSI controller and peripheral. The command is executed when:

  • The received CRC matches with the calculated CRC over the command word, and
  • The CCSI controller is not transmitting
The CRC value for the SOFTRESET_CRC command using CCITT-FALSE algorithm is 0xD383 and when using CRC-16/XMODEM algorithm 0xCE8C.

With a reset of all the internal registers, most of the fault flags that were previously set, are cleared. Only FLAG_POR and FLAG_ERR are reset to HIGH. In addition, all data stored on the RXFIFO becomes inaccessible. If there are CCSI commands in the LED daisy chain that have not been received yet by the CCSI peripheral, the CCSI CRC diagnostics cannot be checked anymore because the calculated CRC values have been cleared for the purpose of synchronization between the CCSI controller and CCSI peripheral. TI recommends to transmit the same number of END bytes as the number of LED drivers in the daisy chain after transmitting the SOFTRESET_CRC command. This clears any already transmitted CCSI command and therefore keeps the synchronization. When the device is in FAILSAFE mode, the SOFTRESET_CRC command brings the device to NORMAL mode. An unsuccessful SOFTRESET_CRC command is recorded in the bit FLAG_SRST in the STATUS register. An example of SOFTRESET_CRC command is depicted in Figure 7-22.

LP5899-Q1 Example of SOFTRESET_CRC command Figure 7-22 Example of SOFTRESET_CRC command