LP5899-Q1
- AEC-Q100 qualified for automotive applications
- Grade 1: –40°C to 125°C ambient temperature
- Device HBM classification level H3A
- Device CDM classification level C5
- Operating voltage VCC range: 2.5V to 5.5V
- SPI peripheral
- Data transfer rate up to 20MHz
- Support multiple peripherals with one controller
- Continuous Clock Serial Interface (CCSI) Controller and Peripheral
- Data transfer rate up to 20MHz
- Programmable clock jitter for EMI enhancement
- Diagnostics
- Open-drain FAULT pin
- SPI communication loss detection
- CRC for SPI communication
- CCSI data integrity
- Data ready interrupt for availability of data
The LP5899-Q1 SPI-compatible connectivity enables LP589x-Q1 device family to be controlled using a standard SPI controller. The device features an internal oscillator to generate the continuous clock required by the LP589x-Q1 device family. Jitter can be added to the continuous clock for EMI enhancement. The transmitted data is aligned to the continuous clock to maintain the timing requirements of the CCSI interface.
LP5899-Q1 incorporates reporting of faults in both the LP589x-Q1 daisy chain and LP5899-Q1 internal. Data transmission of register and VSYNC commands to the LP589x-Q1 daisy chain is CRC protected by LP5899-Q1. In addition, the data line is guarded by LP5899-Q1 for stuck-at faults.
Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | LP5899-Q1 Automotive SPI-Compatible Connectivity for LP589x-Q1 Device Family datasheet | PDF | HTML | 20 Jun 2023 |
EVM User's guide | LP5899 SPI-Compatible Connectivity Evaluation Module for LP589x Device Family User's Guide | PDF | HTML | 19 Nov 2024 | |
User guide | LP589x(-Q1)/TLC698x Sample Code User's Guide (Rev. A) | PDF | HTML | 06 Sep 2024 |
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WSON (DRR) | 12 | Ultra Librarian |
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