SLVSHF3 October   2024 LP5899-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Oscillator and Clocks
        1. 7.3.1.1 System Clock
        2. 7.3.1.2 Continuous Clock Serial Interface (CCSI) Clock
      2. 7.3.2 Continuous Clock Serial Interface (CCSI)
        1. 7.3.2.1 Command Format
        2. 7.3.2.2 Command Recognition and Synchronization
        3. 7.3.2.3 CCSI Command Queue
        4. 7.3.2.4 CCSI Start Bit and Check Bits Insertion and Removal
      3. 7.3.3 FIFO
        1. 7.3.3.1 FIFO level and Data Ready (DRDY) Interrupt
        2. 7.3.3.2 FIFO Clearance
      4. 7.3.4 Diagnostics
        1. 7.3.4.1  Undervoltage Lockout
        2. 7.3.4.2  Oscillator Fault Diagnostics
        3. 7.3.4.3  SPI Communications Loss
        4. 7.3.4.4  SPI Communications Error
          1. 7.3.4.4.1 Reset Timer
          2. 7.3.4.4.2 Chip Select (CS) Reset
          3. 7.3.4.4.3 CRC Error
          4. 7.3.4.4.4 Register write failure
        5. 7.3.4.5  CCSI Communications Loss
          1. 7.3.4.5.1 SIN Stuck-at Diagnostics
        6. 7.3.4.6  CCSI Communications Error
          1. 7.3.4.6.1 CHECK Bit Error
          2. 7.3.4.6.2 Data Integrity Diagnostics
          3. 7.3.4.6.3 CCSI Command Queue Overflow
        7. 7.3.4.7  FIFO Diagnostics
          1. 7.3.4.7.1 TXFIFO Overflow
          2. 7.3.4.7.2 TXFIFO Underflow
          3. 7.3.4.7.3 TXFIFO Single Error Detection (SED)
          4. 7.3.4.7.4 RXFIFO Overflow
          5. 7.3.4.7.5 RXFIFO Underflow
          6. 7.3.4.7.6 RXFIFO Single Error Detection (SED)
        8. 7.3.4.8  OTP CRC Error
        9. 7.3.4.9  Fault Masking
        10. 7.3.4.10 Diagnostics Table
    4. 7.4 Device Functional Modes
      1. 7.4.1 Unpowered
      2. 7.4.2 Initialization State
      3. 7.4.3 Normal State
      4. 7.4.4 Failsafe State
    5. 7.5 Programming
      1. 7.5.1 SPI Data Validity
      2. 7.5.2 Chip Select (CS) and SPI Reset Control
      3. 7.5.3 SPI Command Format
      4. 7.5.4 SPI Command Detail
    6. 7.6 Device Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Programming Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5.3 SPI Command Format

Figure 7-9 and Table 7-2 define the format of the SPI command transmission. Each SPI command contains multiple 16-bit words. The different types of words are:

  • Command word: The command word always includes an identifier of the command type. Dependent on the type, the command word also includes:
    • Start address to be written or read. When field address = 0 means address 0x00.
    • Length of the data that is transmitted or expected to be read. When the length field starts with opt, the data is optional. Therefore, opt_data_length = 0 means 0 data words. For fields that do not start with opt, data_length = 0 means 1 data word.
    • Number of extra END bytes to append when forwarding data. When field extra_end_bytes = 0 means 0 additional END bytes. A maximum of 127 extra END bytes can be appended with one SPI command.
    • Fixed data (in case of SOFTRESET_CRC command)
  • Data word: Dependent of the command type this is data that needs to be forwarded (0 to N), register data that is written to (0 to N) or read from (N+1 to M) the device, or data read from (N+1 to M) the RXFIFO.
  • CRC word: There are 2 different CRC words in each command:
    • CRC word that is generated by the SPI controller. This CRC is calculated over the SPI command word and all transmitted data words (0 to N)
    • CRC word that is generated by the SPI peripheral. This CRC is calculated over all the returned data words (N+1 to M).
    Two different CRC algorithms are supported. The default algorithm is CCITT-FALSE. This can be changed to the CRC-16/XMODEM algorithm using the REG_WR command. After changing the CRC algorithm, the next SPI command uses the new algorithm. Both algorithms are based on the polynomial X16 + X12 + X5 + 1.

LP5899-Q1 SPI Command Format Figure 7-9 SPI Command Format
Table 7-2 SPI Command Detail
Command Type Command Word Data words CRC word
CMD[15:12] 11 10 9 8 7 6 5 4 3 2 1 0
FWD_WR_CRC 0x2 0x0 data_length[8:0] data word 0-data_length CRC
FWD_WR 0x3 data_length[11:0] data word 0-data_length CRC
FWD_WR_END_CRC 0x4 opt_data_length[4:0] extra_end_bytes[6:0] data word 0-(opt_data_length-1) CRC
FWD_WR_END 0x5 opt_data_length[4:0] extra_end_bytes[6:0] data word 0-(opt_data_length-1) CRC
FWD_RD_END_CRC 0x6 data_length[4:0] extra_end_bytes[6:0] data word 0-data_length CRC
FWD_RD_END 0x7 data_length[4:0] extra_end_bytes[6:0] data word 0-data_length CRC
DATA_RD_CRC 0x8 0x0 data_length[7:0] N/A CRC
DATA_RD 0x9 0x0 data_length[7:0] N/A CRC
REG_WR_CRC 0xA 0x0 address[3:0] 0x0 data_length[3:0] data word 0-data_length CRC
REG_WR 0xB 0x0 address[3:0] 0x0 data_length[3:0] data word 0-data_length CRC
REG_RD_CRC 0xC 0x0 address[3:0] 0x0 data_length[3:0] N/A CRC
REG_RD 0xD 0x0 address[3:0] 0x0 data_length[3:0] N/A CRC
SOFTRESET_CRC 0xE 0x1E1 N/A CRC