SNVSC57
September 2022
LP5912-EP
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Output and Input Capacitors
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Enable (EN)
7.3.2
Output Automatic Discharge (RAD)
7.3.3
Reverse Current Protection (IRO)
7.3.4
Internal Current Limit (ISC)
7.3.5
Thermal Overload Protection (TSD)
7.3.6
Power-Good Output (PG)
7.4
Device Functional Modes
7.4.1
Enable (EN)
7.4.2
Minimum Operating Input Voltage (VIN)
8
Applications and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
External Capacitors
8.2.2.2
Input Capacitor
8.2.2.3
Output Capacitor
8.2.2.4
Capacitor Characteristics
8.2.2.5
Remote Capacitor Operation
8.2.2.6
Power Dissipation
8.2.2.7
Estimating Junction Temperature
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
10
Electrostatic Discharge Caution
11
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DRV|6
MPDS216E
Thermal pad, mechanical data (Package|Pins)
DRV|6
QFND087M
Orderable Information
snvsc57_oa
snvsc57_pm
4
Revision History
DATE
REVISION
NOTES
September 2022
*
Initial Release