SNVSC07A June 2021 – September 2022 LP876242-Q1
PRODUCTION DATA
The residual voltage (RV) checking feature ensures the voltage level at the buck regulators or VMONx inputs is below VTH_SC_RV before it can be ramped up the target output voltage. If BUCKn/VMONn_RV_SEL=1 by default, residual voltage is also checked before the device enters BOOT_BIST state. If the residual voltage is greater than VTH_SC_RV , the device waits until voltage goes below VTH_SC_RV before starting BOOT_BIST.
This feature is enabled by the BUCKn_VMON_EN and BUCKn_RV_SEL bits for each buck regulators, and by the VMONn_EN and VMONn_RV_SEL bits for VMON inputs. When this feature is enabled, the voltage monitor of the corresponding regulator or monitoring input remains on after the monitoring is disabled, and remain on for the RV Timeout period. After the RV Timeout period elapses the monitored voltage is compared to the short circuit (SC) threshold of VTH_SC_RV, and assert the corresponding BUCKn_SC_INT or VMONn_RV_INT interrupt bits if the residual voltage is still higher than the threshold voltage. The RV timeout period for the BUCK regulators and VMON inputs is automatically calculated by the digital controller inside the device by Equation 3 and Equation 4. If external voltage is monitored with buck feedback pin, buck is disabled all the time (BUCKn_EN = 0).
Figure 7-8 shows the timing diagram of the residual voltage checking operation that results in pass or fail results.