SNVSC07A June 2021 – September 2022 LP876242-Q1
PRODUCTION DATA
The 2-bit, watchdog-answer counter, WD_ANSW_CNT[1:0], counts the number of received answer-bytes and controls the generation of the reference answer-byte as shown in Figure 7-22. At the start of each watchdog sequence, the default value of the WD_ANSW_CNT[1:0] counter is 2’b11 to indicate that the watchdog expects the MCU to write the correct Answer-3 in WD_ANSWER[7:0].
The device sets the WD_ANSW_ERR status bit as soon as one answer byte is not correct. The device clears this status bit only if the MCU writes a ‘1’ to this bit.