DATA SHEET
MSP430FR203x Mixed-Signal Microcontrollers
1 Device Overview
1.1 Features
- Embedded microcontroller
- 16-bit RISC architecture up to 16 MHz
- Wide supply voltage range from 3.6 V down to 1.8 V (minimum supply voltage is restricted by SVS levels, see the SVS Specifications)
- Optimized low-power modes (at 3 V)
- Active: 126 µA/MHz
- Standby
- LPM3.5 with VLO: 0.4 µA
- Real-time clock (RTC) counter (LPM3.5 with 32768-Hz crystal): 0.77 µA
- Shutdown (LPM4.5): 15 nA
- Low-power ferroelectric RAM (FRAM)
- Up to 15.5KB of nonvolatile memory
- Built-in error correction code (ECC)
- Configurable write protection
- Unified memory of program, constants, and storage
- 1015 write cycle endurance
- Radiation resistant and nonmagnetic
- Intelligent digital peripherals
- IR modulation logic
- Two 16-bit timers with three capture/compare registers each (Timer_A3)
- One 16-bit counter-only RTC counter
- 16-bit cyclic redundancy check (CRC)
- Enhanced serial communications
- Enhanced USCI A (eUSCI_A) supports UART, IrDA, and SPI
- Enhanced USCI B (eUSCI_B) supports SPI and I2C
- High-performance analog
- 10-channel 10-bit analog-to-digital converter (ADC)
- Internal 1.5-V reference
- Sample-and-hold 200 ksps
- 10-channel 10-bit analog-to-digital converter (ADC)
- Clock system (CS)
- On-chip 32-kHz RC oscillator (REFO)
- On-chip 16-MHz digitally controlled oscillator (DCO) with frequency locked loop (FLL)
- ±1% accuracy with on-chip reference at room temperature
- On-chip very low-frequency 10-kHz oscillator (VLO)
- On-chip high-frequency modulation oscillator clock (MODCLK)
- External 32-kHz crystal oscillator (XT1)
- Programmable MCLK prescalar of 1 to 128
- SMCLK derived from MCLK with programmable prescalar of 1, 2, 4, or 8
- General input/output and pin functionality
- Total 60 I/Os on 64-pin package
- 16 interrupt pins (P1 and P2) can wake MCU from LPMs
- All I/Os are capacitive touch I/Os
- Development tools and software
- Free professional development environments
- Family members (also see Device Comparison)
- MSP430FR2033: 15KB of program FRAM + 512B of information FRAM + 2KB of RAM
- MSP430FR2032: 8KB of program FRAM + 512B of information FRAM + 1KB of RAM
- Package options
- 64 pin: LQFP (PM)
- 56 pin: TSSOP (G56)
- 48 pin: TSSOP (G48)
1.2 Applications
- Smoke or fire detectors
- Glass breakage detectors
- Industrial sensor management
- System supervisor, low-power coprocessors
- Temperature sensors or controllers
- Data storage, data integration
- Human machine interface (HMI) controllers
1.3 Description
The TI MSP430™ family of low-power microcontrollers consists of several devices that feature different sets of peripherals targeted for various applications. The architecture, combined with extensive low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The DCO allows the device to wake up from low-power modes to active mode in less than 10 µs.
For complete module descriptions, see the MSP430FR4xx and MSP430FR2xx Family User's Guide.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE(2) |
|---|---|---|
| MSP430FR2033IPM | LQFP (64) | 10 mm × 10 mm |
| MSP430FR2033IG56 | TSSOP (56) | 14.0 mm × 6.1 mm |
| MSP430FR2033IG48 | TSSOP (48) | 12.5 mm × 6.1 mm |
| MSP430FR2032IPM | LQFP (64) | 10 mm × 10 mm |
| MSP430FR2032IG56 | TSSOP (56) | 14.0 mm × 6.1 mm |
| MSP430FR2032IG48 | TSSOP (48) | 12.5 mm × 6.1 mm |
(1) For the most current part, package, and ordering information, see the Package Option Addendum in Section 9, or see the TI website at www.ti.com.
(2) The sizes shown here are approximations. For the package dimensions with tolerances, see the Mechanical Data in Section 9.
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram.
Figure 1-1 Functional Block Diagram - The device has one main power pair of DVCC and DVSS that supplies both digital and analog modules. Recommended bypass and decoupling capacitors are 4.7 µF to 10 µF and 0.1 µF, respectively, with ±5% accuracy.
- P1 and P2 feature the pin-interrupt function and can wake the MCU from LPM3.5.
- Each Timer_A3 has three CC registers, but only the CCR1 and CCR2 are externally connected. CCR0 registers can only be used for internal period timing and interrupt generation.
- In LPM3.5, the RTC counter can be functional while the remaining peripherals are off.
- Not all I/Os are bonded in TSSOP-56 and TSSOP-48 packages (refer to Table 4-1). All I/Os can be configured as Capacitive Touch I/Os.
