SLASE34E May 2014 – August 2018 MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869
PRODUCTION DATA.
The DMA controller allows movement of data from one memory address to another without CPU intervention. For example, the DMA controller can be used to move data from the ADC12_B conversion memory to RAM. Using the DMA controller can increase the throughput of peripheral modules. The DMA controller reduces system power consumption by allowing the CPU to remain in sleep mode, without having to wake to move data to or from a peripheral. Table 6-12 lists the available triggers for the DMA.
TRIGGER | CHANNEL 0 | CHANNEL 1 | CHANNEL 2 |
---|---|---|---|
0 | DMAREQ | DMAREQ | DMAREQ |
1 | TA0CCR0 CCIFG | TA0CCR0 CCIFG | TA0CCR0 CCIFG |
2 | TA0CCR2 CCIFG | TA0CCR2 CCIFG | TA0CCR2 CCIFG |
3 | TA1CCR0 CCIFG | TA1CCR0 CCIFG | TA1CCR0 CCIFG |
4 | TA1CCR2 CCIFG | TA1CCR2 CCIFG | TA1CCR2 CCIFG |
5 | TA2CCR0 CCIFG | TA2CCR0 CCIFG | TA2CCR0 CCIFG |
6 | TA3CCR0 CCIFG | TA3CCR0 CCIFG | TA3CCR0 CCIFG |
7 | TB0CCR0 CCIFG | TB0CCR0 CCIFG | TB0CCR0 CCIFG |
8 | TB0CCR2 CCIFG | TB0CCR2 CCIFG | TB0CCR2 CCIFG |
9 | Reserved | Reserved | Reserved |
10 | Reserved | Reserved | Reserved |
11 | Reserved | Reserved | Reserved |
12 | Reserved | Reserved | Reserved |
13 | Reserved | Reserved | Reserved |
14 | UCA0RXIFG | UCA0RXIFG | UCA0RXIFG |
15 | UCA0TXIFG | UCA0TXIFG | UCA0TXIFG |
16 | UCA1RXIFG | UCA1RXIFG | UCA1RXIFG |
17 | UCA1TXIFG | UCA1TXIFG | UCA1TXIFG |
18 | UCB0RXIFG (SPI)
UCB0RXIFG0 (I2C) |
UCB0RXIFG (SPI)
UCB0RXIFG0 (I2C) |
UCB0RXIFG (SPI)
UCB0RXIFG0 (I2C) |
19 | UCB0TXIFG (SPI)
UCB0TXIFG0 (I2C) |
UCB0TXIFG (SPI)
UCB0TXIFG0 (I2C) |
UCB0TXIFG (SPI)
UCB0TXIFG0 (I2C) |
20 | UCB0RXIFG1 (I2C) | UCB0RXIFG1 (I2C) | UCB0RXIFG1 (I2C) |
21 | UCB0TXIFG1 (I2C) | UCB0TXIFG1 (I2C) | UCB0TXIFG1 (I2C) |
22 | UCB0RXIFG2 (I2C) | UCB0RXIFG2 (I2C) | UCB0RXIFG2 (I2C) |
23 | UCB0TXIFG2 (I2C) | UCB0TXIFG2 (I2C) | UCB0TXIFG2 (I2C) |
24 | UCB0RXIFG3 (I2C) | UCB0RXIFG3 (I2C) | UCB0RXIFG3 (I2C) |
25 | UCB0TXIFG3 (I2C) | UCB0TXIFG3 (I2C) | UCB0TXIFG3 (I2C) |
26 | ADC12 end of conversion | ADC12 end of conversion | ADC12 end of conversion |
27 | Reserved | Reserved | Reserved |
28 | Reserved | Reserved | Reserved |
29 | MPY ready | MPY ready | MPY ready |
30 | DMA2IFG | DMA0IFG | DMA1IFG |
31 | DMAE0 | DMAE0 | DMAE0 |