SLASE54 Data sheet

SLASE54D March 2016 – January 2021 MSP430FR5962 , MSP430FR5964 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

PM|64
- MTQF008B
ZVW|87
- MPBG401A
PN|80
- MTQF010B
RGZ|48
- MPQF123F

Thermal pad, mechanical data (Package|Pins)

RGZ|48
- QFND031W

Orderable Information

8.12.3.2 High-Frequency Crystal Oscillator, HFXT

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER ⁽¹⁾		TEST CONDITIONS	V_CC	MIN	TYP	MAX	UNIT
I_DVCC.HFXT	HFXT oscillator crystal current HF mode at typical ESR	f_OSC = 4 MHz, HFXTBYPASS = 0, HFXTDRIVE = 0, HFFREQ = 1 ⁽²⁾, T_A = 25°C, C_L,eff = 18 pF, typical ESR, C_shunt	3.0 V		75		μA
		f_OSC = 8 MHz, HFXTBYPASS = 0, HFXTDRIVE = 1, HFFREQ = 1, T_A = 25°C, C_L,eff = 18 pF, typical ESR, C_shunt			120
		f_OSC = 16 MHz, HFXTBYPASS = 0, HFXTDRIVE = 2, HFFREQ = 2, T_A = 25°C C_L,eff = 18 pF, typical ESR, C_shunt			190
		f_OSC = 24 MHz HFXTBYPASS = 0, HFXTDRIVE = 3, HFFREQ = 3, T_A = 25°C C_L,eff = 18 pF, typical ESR, C_shunt			250
f_HFXT	HFXT oscillator crystal frequency, crystal mode	HFXTBYPASS = 0, HFFREQ = 1 ⁽²⁾ ⁽³⁾		4		8	MHz
		HFXTBYPASS = 0, HFFREQ = 2 ⁽³⁾		8.01		16
		HFXTBYPASS = 0, HFFREQ = 3 ⁽³⁾		16.01		24
DC_HFXT	HFXT oscillator duty cycle.	Measured at SMCLK, f_HFXT = 16 MHz		40%	50%	60%
f_HFXT,SW	HFXT oscillator logic-level square-wave input frequency, bypass mode	HFXTBYPASS = 1, HFFREQ = 0 ⁽⁴⁾ ⁽³⁾		0.9		4	MHz
		HFXTBYPASS = 1, HFFREQ = 1 0 ⁽⁴⁾ ⁽³⁾		4.01		8
		HFXTBYPASS = 1, HFFREQ = 20 ⁽⁴⁾ ⁽³⁾		8.01		16
		HFXTBYPASS = 1, HFFREQ = 3 0 ⁽⁴⁾ ⁽³⁾		16.01		24
DC_{HFXT, SW}	HFXT oscillator logic-level square-wave input duty cycle	HFXTBYPASS = 1		40%		60%
OA_HFXT	Oscillation allowance for HFXT crystals⁽⁵⁾	HFXTBYPASS = 0, HFXTDRIVE = 0, HFFREQ = 1 ⁽²⁾, f_HFXT,HF = 4 MHz, C_L,eff = 16 pF			450		Ω
		HFXTBYPASS = 0, HFXTDRIVE = 1, HFFREQ = 1 f_HFXT,HF = 8 MHz, C_L,eff = 16 pF			320
		HFXTBYPASS = 0, HFXTDRIVE = 2, HFFREQ = 2 f_HFXT,HF = 16 MHz, C_L,eff = 16 pF			200
		HFXTBYPASS = 0, HFXTDRIVE = 3, HFFREQ = 3 f_HFXT,HF = 24 MHz, C_L,eff = 16 pF			200
t_START,HFXT	Startup time ⁽⁶⁾	f_OSC = 4 MHz, HFXTBYPASS = 0, HFXTDRIVE = 0, HFFREQ = 1, T_A = 25°C, C_L,eff = 16 pF	3.0 V		1.6		ms
t_START,HFXT	Startup time ⁽⁶⁾	f_OSC = 24 MHz, HFXTBYPASS = 0, HFXTDRIVE = 3, HFFREQ = 3, T_A = 25°C, C_L,eff = 16 pF	3.0 V		0.6		ms
C_HFXIN	Integrated load capacitance at HFXIN terminaI ⁽⁷⁾ ⁽⁸⁾				2		pF
C_HFXOUT	Integrated load capacitance at HFXOUT terminaI ⁽⁷⁾ ⁽⁸⁾				2		pF
f_Fault,HFXT	Oscillator fault frequency ⁽⁹⁾ ⁽¹⁰⁾			0		800	kHz

(1) To improve EMI on the HFXT oscillator the following guidelines should be observed.

Keep the traces between the device and the crystal as short as possible.
Design a good ground plane around the oscillator pins.
Prevent crosstalk from other clock or data lines into oscillator pins HFXIN and HFXOUT.
Avoid running PCB traces underneath or adjacent to the HFXIN and HFXOUT pins.
Use assembly materials and processes that avoid any parasitic load on the oscillator HFXIN and HFXOUT pins.
If conformal coating is used, ensure that it does not induce capacitive or resistive leakage between the oscillator pins.

(2) HFFREQ = {0} is not supported for HFXT crystal mode of operation.

(3) Maximum frequency of operation of the entire device cannot be exceeded.

(4) When HFXTBYPASS is set, HFXT circuits are automatically powered down. Input signal is a digital square wave with parametrics defined in the Schmitt-trigger Inputs section of this datasheet. Duty cycle requirements are defined by DC_{HFXT, SW}.

(5) Oscillation allowance is based on a safety factor of 5 for recommended crystals.

(6) Includes startup counter of 1024 clock cycles.

(7) This represents all the parasitic capacitance present at the HFXIN and HFXOUT terminals, respectively, including parasitic bond and package capacitance. The effective load capacitance, C_L,eff can be computed as C_IN × C_OUT / (C_IN + C_OUT), where C_IN and C_OUT is the total capacitance at the HFXIN and HFXOUT terminals, respectively.

(8) Requires external capacitors at both terminals to meet the effective load capacitance specified by crystal manufacturers. Recommended effective load capacitance values supported are 14 pF, 16 pF, and 18 pF. Maximum shunt capacitance of 7 pF. The PCB adds additional capacitance, so it must also be considered in the overall capacitance. Verify that the recommended effective load capacitance of the selected crystal is met.

(9) Frequencies above the MAX specification do not set the fault flag. Frequencies between the MIN and MAX might set the flag. A static condition or stuck at fault condition will set the flag.

(10) Measured with logic-level input frequency but also applies to operation with crystals.

The DCO (see Section 8.12.3.3) is an internal digitally controlled oscillator (DCO) with selectable frequencies.