SLASE54D March   2016  – January 2021 MSP430FR5962 , MSP430FR5964 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Functional Block Diagram
  5. 5 Revision History
  6. 6 Device Comparison
    1. 6.1 Related Products
  7. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagrams
    2. 7.2 Pin Attributes
    3. 7.3 Signal Descriptions
    4. 7.4 Pin Multiplexing
    5. 7.5 Buffer Types
    6. 7.6 Connection of Unused Pins
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 8.5  Typical Characteristics, Active Mode Supply Currents
    6. 8.6  Low-Power Mode (LPM0, LPM1) Supply Currents Into VCC Excluding External Current
    7. 8.7  Low-Power Mode (LPM2, LPM3, LPM4) Supply Currents (Into VCC) Excluding External Current
    8. 8.8  Low-Power Mode (LPMx.5) Supply Currents (Into VCC) Excluding External Current
    9. 8.9  Typical Characteristics, Low-Power Mode Supply Currents
    10. 8.10 Typical Characteristics, Current Consumption per Module
    11. 8.11 Thermal Packaging Characteristics
    12. 8.12 Timing and Switching Characteristics
      1. 8.12.1  Power Supply Sequencing
        1. 8.12.1.1 Brownout and Device Reset Power Ramp Requirements
        2. 8.12.1.2 SVS
      2. 8.12.2  Reset Timing
        1. 8.12.2.1 Reset Input
      3. 8.12.3  Clock Specifications
        1. 8.12.3.1 Low-Frequency Crystal Oscillator, LFXT
        2. 8.12.3.2 High-Frequency Crystal Oscillator, HFXT
        3. 8.12.3.3 DCO
        4. 8.12.3.4 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
        5. 8.12.3.5 Module Oscillator (MODOSC)
      4. 8.12.4  Wake-up Characteristics
        1. 8.12.4.1 Wake-up Times From Low-Power Modes and Reset
        2. 8.12.4.2 Typical Characteristics, Average LPM Currents vs Wake-up Frequency
        3. 8.12.4.3 Typical Wake-up Charge
      5. 8.12.5  Digital I/Os
        1. 8.12.5.1 Digital Inputs
        2. 8.12.5.2 Digital Outputs
        3. 8.12.5.3 Typical Characteristics, Digital Outputs at 3.0 V and 2.2 V
        4. 8.12.5.4 Pin-Oscillator Frequency, Ports Px
        5. 8.12.5.5 Typical Characteristics, Pin-Oscillator Frequency
      6. 8.12.6  LEA (Low-Energy Accelerator) (MSP430FR599x Only)
        1. 8.12.6.1 Low Energy Accelerator Performance
      7. 8.12.7  Timer_A and Timer_B
        1. 8.12.7.1 Timer_A
        2. 8.12.7.2 Timer_B
      8. 8.12.8  eUSCI
        1. 8.12.8.1 eUSCI (UART Mode) Clock Frequency
        2. 8.12.8.2 eUSCI (UART Mode)
        3. 8.12.8.3 eUSCI (SPI Master Mode) Clock Frequency
        4. 8.12.8.4 eUSCI (SPI Master Mode)
        5. 8.12.8.5 eUSCI (SPI Slave Mode)
        6. 8.12.8.6 eUSCI (I2C Mode)
      9. 8.12.9  ADC12_B
        1. 8.12.9.1 12-Bit ADC, Power Supply and Input Range Conditions
        2. 8.12.9.2 12-Bit ADC, Timing Parameters
        3. 8.12.9.3 12-Bit ADC, Linearity Parameters
        4. 8.12.9.4 12-Bit ADC, Dynamic Performance With External Reference
        5. 8.12.9.5 12-Bit ADC, Dynamic Performance With Internal Reference
        6. 8.12.9.6 12-Bit ADC, Temperature Sensor and Built-In V1/2
        7. 8.12.9.7 12-Bit ADC, External Reference
      10. 8.12.10 Reference
        1. 8.12.10.1 REF, Built-In Reference
      11. 8.12.11 Comparator
        1. 8.12.11.1 Comparator_E
      12. 8.12.12 FRAM
        1. 8.12.12.1 FRAM
      13. 8.12.13 Emulation and Debug
        1. 8.12.13.1 JTAG and Spy-Bi-Wire Interface
  9. 9 Detailed Description
    1. 9.1  Overview
    2. 9.2  CPU
    3. 9.3  Low-Energy Accelerator (LEA) for Signal Processing (MSP430FR599x Only)
    4. 9.4  Operating Modes
      1. 9.4.1 Peripherals in Low-Power Modes
      2. 9.4.2 Idle Currents of Peripherals in LPM3 and LPM4
    5. 9.5  Interrupt Vector Table and Signatures
    6. 9.6  Bootloader (BSL)
    7. 9.7  JTAG Operation
      1. 9.7.1 JTAG Standard Interface
      2. 9.7.2 Spy-Bi-Wire Interface
    8. 9.8  FRAM Controller A (FRCTL_A)
    9. 9.9  RAM
    10. 9.10 Tiny RAM
    11. 9.11 Memory Protection Unit (MPU) Including IP Encapsulation
    12. 9.12 Peripherals
      1. 9.12.1  Digital I/O
      2. 9.12.2  Oscillator and Clock System (CS)
      3. 9.12.3  Power-Management Module (PMM)
      4. 9.12.4  Hardware Multiplier (MPY)
      5. 9.12.5  Real-Time Clock (RTC_C)
      6. 9.12.6  Watchdog Timer (WDT_A)
      7. 9.12.7  System Module (SYS)
      8. 9.12.8  DMA Controller
      9. 9.12.9  Enhanced Universal Serial Communication Interface (eUSCI)
      10. 9.12.10 TA0, TA1, and TA4
      11. 9.12.11 TA2 and TA3
      12. 9.12.12 TB0
      13. 9.12.13 ADC12_B
      14. 9.12.14 Comparator_E
      15. 9.12.15 CRC16
      16. 9.12.16 CRC32
      17. 9.12.17 AES256 Accelerator
      18. 9.12.18 True Random Seed
      19. 9.12.19 Shared Reference (REF)
      20. 9.12.20 Embedded Emulation
        1. 9.12.20.1 Embedded Emulation Module (EEM) (S Version)
        2. 9.12.20.2 EnergyTrace++ Technology
    13. 9.13 Input/Output Diagrams
      1. 9.13.1  Capacitive Touch Functionality on Ports P1 to P8, and PJ
      2. 9.13.2  Port P1 (P1.0 to P1.2) Input/Output With Schmitt Trigger
      3. 9.13.3  Port P1 (P1.3 to P1.5) Input/Output With Schmitt Trigger
      4. 9.13.4  Port P1 (P1.6 and P1.7) Input/Output With Schmitt Trigger
      5. 9.13.5  Port P2 (P2.0 to P2.2) Input/Output With Schmitt Trigger
      6. 9.13.6  Port P2 (P2.3 and P2.4) Input/Output With Schmitt Trigger
      7. 9.13.7  Port P2 (P2.5 and P2.6) Input/Output With Schmitt Trigger
      8. 9.13.8  Port P2 (P2.7) Input/Output With Schmitt Trigger
      9. 9.13.9  Port P3 (P3.0 to P3.3) Input/Output With Schmitt Trigger
      10. 9.13.10 Port P3 (P3.4 to P3.7) Input/Output With Schmitt Trigger
      11. 9.13.11 Port P4 (P4.0 to P4.3) Input/Output With Schmitt Trigger
      12. 9.13.12 Port P4 (P4.4 to P4.7) Input/Output With Schmitt Trigger
      13. 9.13.13 Port P5 (P5.0 to P5.7) Input/Output With Schmitt Trigger
      14. 9.13.14 Port P6 (P6.0 to P6.7) Input/Output With Schmitt Trigger
      15. 9.13.15 Port P7 (P7.0 to P7.3) Input/Output With Schmitt Trigger
      16. 9.13.16 Port P7 (P7.4 to P7.7) Input/Output With Schmitt Trigger
      17. 9.13.17 Port P8 (P8.0 to P8.3) Input/Output With Schmitt Trigger
      18. 9.13.18 Port PJ (PJ.4 and PJ.5) Input/Output With Schmitt Trigger
      19. 9.13.19 Port PJ (PJ.6 and PJ.7) Input/Output With Schmitt Trigger
      20. 9.13.20 Port PJ (PJ.0 to PJ.3) JTAG Pins TDO, TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger
    14. 9.14 Device Descriptors (TLV)
    15. 9.15 Memory Map
      1. 9.15.1 Peripheral File Map
    16. 9.16 Identification
      1. 9.16.1 Revision Identification
      2. 9.16.2 Device Identification
      3. 9.16.3 JTAG Identification
  10. 10Applications, Implementation, and Layout
    1. 10.1 Device Connection and Layout Fundamentals
      1. 10.1.1 Power Supply Decoupling and Bulk Capacitors
      2. 10.1.2 External Oscillator
      3. 10.1.3 JTAG
      4. 10.1.4 Reset
      5. 10.1.5 Unused Pins
      6. 10.1.6 General Layout Recommendations
      7. 10.1.7 Do's and Don'ts
    2. 10.2 Peripheral- and Interface-Specific Design Information
      1. 10.2.1 ADC12_B Peripheral
        1. 10.2.1.1 Partial Schematic
        2. 10.2.1.2 Design Requirements
        3. 10.2.1.3 Detailed Design Procedure
        4. 10.2.1.4 Layout Guidelines
  11. 11Device and Documentation Support
    1. 11.1  Getting Started
    2. 11.2  Device Nomenclature
    3. 11.3  Tools and Software
    4. 11.4  Documentation Support
    5. 11.5  Related Links
    6. 11.6  Support Resources
    7. 11.7  Trademarks
    8. 11.8  Electrostatic Discharge Caution
    9. 11.9  Export Control Notice
    10. 11.10 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11.3 Tools and Software

All MSP microcontrollers are supported by a wide variety of software and hardware development tools. Tools are available from TI and various third parties. See them all at MSP430 ultra-low-power MCUs – Design & development.

Table 11-1 lists the debug features supported in the hardware of the MSP430FR599x and MSP430FR596x MCUs. See the Code Composer Studio™ IDE for MSP430™ MCUs User's Guide for details on the available hardware features.

Table 11-1 Debug Features
MSP ARCHITECTURE4-WIRE JTAG2-WIRE JTAGBREAK- POINTS
(N)		RANGE BREAK- POINTSCLOCK CONTROLSTATE SEQUENCERTRACE BUFFERLPMx.5 DEBUGGING SUPPORTEnergyTrace++ TECHNOLOGY
MSP430Xv2YesYes3YesYesNoNoYesYes

EnergyTrace™ technology is supported with Code Composer Studio IDE version 6.0 and newer. It requires specialized debugger circuitry, which is supported with the second-generation onboard eZ-FET flash emulation tool and second-generation stand-alone MSP-FET JTAG emulator. See the following documents for detailed information:

MSP430 Advanced Power Optimizations: ULP Advisor™ and EnergyTrace™ Technology

Advanced Debugging Using the Enhanced Emulation Module (EEM) With Code Composer Studio™ IDE

MSP430™ Hardware Tools User's Guide

Design Kits and Evaluation Modules

MSP430FR5994 LaunchPad™ Development Kit

The MSP-EXP430FR5994 LaunchPad Development Kit is an easy-to-use Evaluation Module (EVM) for the MSP430FR5994 microcontroller (MCU). It contains everything needed to start developing on the ultra-low-power MSP430FRx FRAM microcontroller platform, including an onboard debug probe for programming, debugging, and energy measurements.

80-pin Target Development Board and MSP-FET Programmer Bundle for MSP430F599x MCUs

The target socket boards allow easy programming and debugging of the device using JTAG. They also feature header pinouts for prototyping. Target socket boards are orderable individually or as a kit with the JTAG programmer and debugger included.

80-pin Target Development Board for MSP430F599x MCUs

The MSP-TS430PN80B is a stand-alone 80-pin ZIF socket target board that is used to program and debug the MSP430 MCU in-system through the JTAG interface or the Spy Bi-Wire (2-wire JTAG) protocol.

Software

MSP430Ware™ Software

MSP430Ware software is a collection of code examples, data sheets, and other design resources for all MSP430 devices delivered in a convenient package. In addition to providing a complete collection of existing MSP430 MCU design resources, MSP430Ware software also includes a high-level API called MSP Driver Library. This library makes it easy to program MSP430 hardware. MSP430Ware software is available as a component of CCS or as a stand-alone package.

MSP430FR599x, MSP430FR596x Code Examples

C code examples are available for every MSP device that configures each of the integrated peripherals for various application needs.

Capacitive Touch Software Library

Free C libraries for enabling capacitive touch capabilities on MSP430 MCUs. The library features several capacitive touch implementations including the RO and RC method. In addition to the full C code libraries, hardware design considerations are also provided as a simple guide for including capacitive touch into any MSP430 MCU-based application.

MSP EnergyTrace Technology

EnergyTrace technology for MSP430 microcontrollers is an energy-based code analysis tool that measures and displays the application’s energy profile and helps to optimize it for ultra-low-power consumption.

MSP Driver Library

Driver Library's abstracted API keeps you above the bits and bytes of the MSP430 hardware by providing easy-to-use function calls. Thorough documentation is delivered through a helpful API Guide, which includes details on each function call and the recognized parameters. Developers can use Driver Library functions to write complete projects with minimal overhead.

Digital Signal Processing Library

The Texas Instruments Digital Signal Processing library is a set of highly optimized functions to perform many common signal processing operations on fixed-point numbers for MSP430™ and MSP432™ microcontrollers. This function set is typically used for applications where processing-intensive transforms are done in real-time for minimal energy and with very high accuracy. This library's optimal utilization of the MSP families' intrinsic hardware for fixed-point math allows for significant performance gains.

FRAM Embedded Software Utilities for MSP Ultra-Low-Power Microcontrollers

The FRAM Utilities is designed to grow as a collection of embedded software utilities that leverage the ultra-low-power and virtually unlimited write endurance of FRAM. The utilities are available for MSP430FRxx FRAM microcontrollers and provide example code to help start application development. Included utilities include Compute Through Power Loss (CTPL). CTPL is utility API set that enables ease of use with LPMx.5 low-power modes and a powerful shutdown mode that allows an application to save and restore critical system components when a power loss is detected.

Development Tools

Code Composer Studio Integrated Development Environment for MSP Microcontrollers

Code Composer Studio is an integrated development environment (IDE) that supports all MSP microcontroller devices. Code Composer Studio comprises a suite of embedded software utilities used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor, project build environment, debugger, profiler, and many other features.

Uniflash Standalone Flash Tool for TI Microcontrollers

CCS Uniflash is a stand-alone tool used to program on-chip flash memory on TI MCUs and on-board flash memory for Sitara processors. Uniflash has a GUI, command line, and scripting interface. CCS Uniflash is available free of charge.

MSP MCU Programmer and Debugger

The MSP-FET is a powerful emulation development tool – often called a debug probe – that allows users to quickly begin application development on MSP low-power microcontrollers (MCU). Creating MCU software usually requires downloading the resulting binary program to the MSP device for validation and debugging. The MSP-FET provides a debug communication pathway between a host computer and the target MSP.

MSP-GANG Production Programmer

The MSP Gang Programmer is an MSP430 or MSP432 device programmer that can program up to eight identical MSP430 or MSP432 Flash or FRAM devices at the same time. The MSP Gang Programmer connects to a host PC using a standard RS-232 or USB connection and provides flexible programming options that allow the user to fully customize the process. The MSP Gang Programmer is provided with an expansion board, called the Gang Splitter, that implements the interconnections between the MSP Gang Programmer and multiple target devices.