SLASF94A May 2024 – October 2024 MSPM0L1227 , MSPM0L1228 , MSPM0L2227 , MSPM0L2228
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
TRNGCLKF | TRNG input clock frequency | 9.5 | 10 | 25 | MHz | |
TRNGSTARTUP | TRNG startup time | 520 | µs | |||
TRNGLAT32 | Latency to generate 32 random bits | Decimation ratio = 4, TRNG clock = 20MHz | 6.4 | µs | ||
TRNGLAT256 | Latency to generate 256 random bits | Decimation ratio = 4, TRNG clock = 20MHz | 51.2 | µs |