SLASEX0D October 2022 – January 2024 MSPM0L1303 , MSPM0L1304 , MSPM0L1305 , MSPM0L1306 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PARAMETERS | TEST CONDITIONS | Standard mode | Fast mode | Fast mode plus | UNIT | ||||
---|---|---|---|---|---|---|---|---|---|
MIN | MAX | MIN | MAX | MIN | MAX | ||||
fI2C | I2C input clock frequency | I2C in Power Domain0 | 2 | 32 | 8 | 32 | 20 | 32 | MHz |
fSCL | SCL clock frequency | 0.1 | 0.4 | 1 | MHz | ||||
tHD,STA | Hold time (repeated) START | 4 | 0.6 | 0.26 | us | ||||
tLOW | Low period of the SCL clock | 4.7 | 1.3 | 0.5 | us | ||||
tHIGH | High period of the SCL clock | 4 | 0.6 | 0.26 | us | ||||
tSU,STA | Setup time for a repeated START | 4.7 | 0.6 | 0.26 | us | ||||
tHD,DAT | Data hold time | 0 | 0 | 0 | ns | ||||
tSU,DAT | Data setup time | 250 | 100 | 50 | ns | ||||
tSU,STO | Setup time for STOP | 4 | 0.6 | 0.26 | us | ||||
tBUF | Bus free time between a STOP and START condition | 4.7 | 1.3 | 0.5 | us | ||||
tVD;DAT | Data valid time | 3.45 | 0.9 | 0.45 | us | ||||
tVD;ACK | Data valid acknowledge time | 3.45 | 0.9 | 0.45 | us |