SBOSA00B December   2019  – August 2020 OPA1637

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Characterization Configuration
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Super-Beta Input Bipolar Transistors
      2. 8.3.2 Power Down
      3. 8.3.3 Flexible Gain Setting
      4. 8.3.4 Amplifier Overload Power Limit
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Driving Capacitive Loads
      2. 9.1.2 Operating the Power-Down Feature
      3. 9.1.3 I/O Headroom Considerations
      4. 9.1.4 Noise Performance
    2. 9.2 Typical Applications
      1. 9.2.1 Current-Output Audio DAC Buffer to Class-D Amplifier
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 An MFB Filter Driving an ADC Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Differential Microphone Input to Line Level
        1. 9.2.3.1 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Board Layout Recommendations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.1.4 Noise Performance

The first step in the output noise analysis is to reduce the application circuit to the simplest form with equal feedback and gain setting elements to ground. Figure 9-4 shows the simplest analysis circuit with the FDA and resistor noise terms to be considered.

GUID-1238645C-42ED-4F1B-BB57-FA01916B26DA-low.gifFigure 9-4 FDA Noise Analysis Circuit

The noise powers are shown in Figure 9-4 for each term. When the RF and RG (or RI) terms are matched on each side, the total differential output noise is the root sum squared (RSS) of these separate terms. Using NG ≡ 1 + RF / RG, the total output noise is given by Equation 3. Each resistor noise term is a 4kT × R power (4kT = 1.6E-20 J at 290 K).

Equation 3. GUID-C6AD7DA3-0BB9-406C-B35B-96E3814CFCD4-low.gif

The first term is simply the differential input spot noise times the noise gain. The second term is the input current noise terms times the feedback resistor (and because there are two uncorrelated current noise terms, the power is two times one of them). The last term is the output noise resulting from both the RF and RG resistors, at again, twice the value for the output noise power of each side added together. Running a wide sweep of gains when holding RF to 2 kΩ gives the standard values and resulting noise listed in Table 9-1. When the gain increases, the input-referred noise approaches only the gain of the FDA input voltage noise term at 3.7 nV/√ Hz.

Table 9-1 Swept Gain of the Output- and Input-Referred Spot Noise Calculations
GAIN (V/V)RF (Ω)RG1 (Ω)AVEO (nV/√ Hz)EI (nV/√ Hz)
0.12000200000.19.493.9
120002000113.613.6
220001000217.88.9
520004024.9829.55.9
1020002001048.64.9