For lowest distortion with a source or feedback network with an impedance greater than 2kΩ, match the impedance seen by the positive and negative inputs in noninverting applications. The p-channel JFETs in the FET input stage exhibit a varying input capacitance with applied common-mode input voltage. In inverting configurations, the input does not vary with input voltage, because the inverting input is held at virtual ground. However, in noninverting applications the inputs do vary, and the gate-to-source voltage is not constant. The effect is increased distortion due to the varying capacitance for unmatched source impedances greater than 2kΩ.

To maintain low distortion, match unbalanced source impedance with the appropriate values in the feedback network as shown in Figure 6-2. Of course, the unbalanced impedance can be from gain-setting resistors in the feedback path. If the parallel combination of R₁ and R₂ is greater than 2kΩ, use a matching impedance on the noninverting input. As always, minimize resistor values to reduce the effects of thermal noise.

Figure 6-2 Impedance Matching for Maintaining Low Distortion in Noninverting Circuits