SBOS309E August   2004  – December 2024 OPA2830

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configurations and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics VS = ±5V
    6. 6.6  Electrical Characteristics VS = 5V
    7. 6.7  Electrical Characteristics VS = 3V
    8. 6.8  Typical Characteristics: VS = ±5V
    9. 6.9  Typical Characteristics: VS = ±5V, Differential Configuration
    10. 6.10 Typical Characteristics: VS = 5V
    11. 6.11 Typical Characteristics: VS = 5V, Differential Configuration
    12. 6.12 Typical Characteristics: VS = 3V
    13. 6.13 Typical Characteristics: VS = 3V, Differential Configuration
  8. 7 Parameter Measurement Information
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Wideband Voltage-Feedback Operation
      2. 8.1.2  Single-Supply ADC Interface
      3. 8.1.3  DC Level-Shifting
      4. 8.1.4  AC-Coupled Output Video Line Driver
      5. 8.1.5  Noninverting Amplifier With Reduced Peaking
      6. 8.1.6  Single-Supply Active Filter
      7. 8.1.7  Differential Low-Pass Active Filters
      8. 8.1.8  High-Pass Filters
      9. 8.1.9  High-Performance DAC Transimpedance Amplifier
      10. 8.1.10 Operating Suggestions Optimizing Resistor Values
      11. 8.1.11 Bandwidth vs Gain: Noninverting Operation
      12. 8.1.12 Inverting Amplifier Operation
      13. 8.1.13 Output Current and Voltages
      14. 8.1.14 Driving Capacitive Loads
      15. 8.1.15 Distortion Performance
      16. 8.1.16 Noise Performance
      17. 8.1.17 DC Accuracy and Offset Control
    2. 8.2 Power Supply Recommendations
      1. 8.2.1 Thermal Analysis
    3. 8.3 Layout
      1. 8.3.1 Board Layout Guidelines
        1. 8.3.1.1 Input and ESD Protection
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Design-In Tools
        1. 9.1.1.1 Demonstration Fixtures
        2. 9.1.1.2 Macro-model and Applications Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DGK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.10 Operating Suggestions Optimizing Resistor Values

The OPA2830 is a unity-gain stable, voltage-feedback op amp; therefore, a wide range of resistor values can be used for the feedback and gain setting resistors. The primary limits on these values are set by dynamic range (noise and distortion) and parasitic capacitance considerations. For a noninverting unity-gain follower application, the feedback connection can be made with a direct short.

Less than 200Ω, the feedback network presents additional output loading that can degrade the harmonic distortion performance of the OPA2830. Greater than 1kΩ, the typical parasitic capacitance (approximately 0.2pF) across the feedback resistor can cause unintentional band limiting in the amplifier response.

Recommended to target the parallel combination of RF and RG (see Figure 8-3) to be less than about 400Ω. The combined impedance RF || RG interacts with the inverting input capacitance, placing an additional pole in the feedback network, and thus a zero in the forward response. Assuming a 2pF total parasitic on the inverting node, holding RF || RG < 400Ω keeps the pole above 200MHz. This constraint implies that the feedback resistor RF can increase to several kΩ at high gains. This is acceptable as long as the pole formed by RF and any parasitic capacitance appearing in parallel is kept out of the frequency range of interest.

In the inverting configuration, an additional design consideration must be noted. RG becomes the input resistor and therefore the load impedance to the driving source. If impedance matching is desired, RG can be set equal to the required termination value. However, at low inverting gains, the resultant feedback resistor value can present a significant load to the amplifier output. For example, an inverting gain of 2 with a 50Ω input matching resistor (= RG) requires a 100Ω feedback resistor, which contributes to output loading in parallel with the external load. In such a case, preferably to increase both the RF and RG values, and then achieve the input matching impedance with a third resistor to ground (see Figure 8-15). The total input impedance becomes the parallel combination of RG and the additional shunt resistor.