SBOS933I February   2019  – August 2021 OPA2990 , OPA4990 , OPA990

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information for Single Channel
    5. 6.5 Thermal Information for Dual Channel
    6. 6.6 Thermal Information for Quad Channel
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Protection Circuitry
      2. 7.3.2  EMI Rejection
      3. 7.3.3  Thermal Protection
      4. 7.3.4  Capacitive Load and Stability
      5. 7.3.5  Common-Mode Voltage Range
      6. 7.3.6  Phase Reversal Protection
      7. 7.3.7  Electrical Overstress
      8. 7.3.8  Overload Recovery
      9. 7.3.9  Typical Specifications and Distributions
      10. 7.3.10 Packages With an Exposed Thermal Pad
      11. 7.3.11 Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High Voltage Buffered Multiplexer
      2. 8.2.2 Slew Rate Limit for Input Protection
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1 High Voltage Buffered Multiplexer

The OPAx990S shutdown devices can be configured to create a high voltage, buffered multiplexer. Outputs can be connected together on a common bus and the shutdown pins can be used to select the desired channel to pass through. Since the amplifier circuitry has been designed such that disable transitions occur significantly faster than enable transitions, the amplifier naturally exhibits a "break before make" switch topology. Amplifier outputs enter a high impedance state when placed in shutdown, so there is no risk of bus contention when connecting multiple channel outputs together. Additionally, because outputs are isolated from inputs, there is no concern about the impedance at the input of each channel interacting undesirably with the impedance at the output, like an amplifier gain stage or ADC driver circuit. Also, because this topology uses amplifiers instead of MOSFET switches, other common issues with multiplexers such as charge injection or signal error due to RON effects are eliminated.

Figure 8-1 shows an example topology for a basic 2:1 multiplexer. When SEL is low, channel 1 is selected and active; when SEL is high, channel 2 is selected and active. For more information on how to use the OPAx990S shutdown function, see the shutdown section in the Electrical Characteristics table.

GUID-07EE87BC-D3ED-4EAA-BA24-BF234E48E250-low.gifFigure 8-1 High Voltage Buffered Multiplexer