SBAS884A March 2020 – June 2020 PCM6240-Q1 , PCM6260-Q1 , PCM6340-Q1 , PCM6360-Q1
PRODUCTION DATA.
This register is the GPIO configuration register 2. Not applicable for PCM6x60-Q1.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
GPIO3_CFG[3:0] | Reserved | GPIO3_DRV[2:0] | |||||
RW-0h | R-0h | RW-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-4 | GPIO3_CFG[3:0] | RW | 0h | GPIO3 configuration.
0d = GPIO3 is disabled 1d = GPIO3 is configured as a general-purpose output (GPO) 2d = GPIO3 is configured as a device interrupt output (IRQ) 3d = GPIO3 is configured as a secondary ASI output (SDOUT2) 4d = Reserved 5d = Reserved 6d = Reserved 7d = GPIO3 is configured as an input to power down all ADC channels 8d = GPIO3 is configured as an input to control when MICBIAS turns on or off (MICBIAS_EN) 9d = GPIO3 is configured as a general-purpose input (GPI) 10d = GPIO3 is configured as a master clock input (MCLK) 11d = GPIO3 is configured as an ASI input for daisy-chain (SDIN) 12d = Reserved 13d = Reserved 14d = Reserved |
3 | Reserved | R | 0h | Reserved |
2-0 | GPIO3_DRV[2:0] | RW | 0h | GPIO3 output drive configuration (not used when GPIO3 is configured as SDOUT2).
0d = Hi-Z output 1d = Drive active low and active high 2d = Drive active low and weak high 3d = Drive active low and Hi-Z 4d = Drive weak low and active high 5d = Drive Hi-Z and active high 6d to 7d = Reserved |