8.2.2.1 Design Requirements
There are only a few requirements to take into account when using the PGA305 in a design:
- Do not exceed the maximum slew rate of 0.5 V/µs at the VDD pin.
- Place a 100-nF capacitor from the AVDD pin to ground, as close to the AVDD pin as possible.
- Place a 100-nF capacitor from the DVDD pin to ground, as close to the DVDD pin as possible.
- Place a capacitor between 10 nF and 1000 nF from the REFCAP pin to ground, as close to the REFCAP pin as possible.
- Use the COMP pin and an isolation resistor to implement compensation when driving large capacitive loads with the OUT pin.