SBOSAG3 March 2024 PGA849
ADVANCE INFORMATION
Refer to the PDF data sheet for device specific package drawings
The design requirements for the application driving the ADS8860 ADC are listed in the following table.
PARAMETER | VALUE |
---|---|
Supply voltages | VS± = ±15V, LVDD = 5.3V, LVSS = GND, ADC REFIN = 5V, PGA REF = 2.5V |
Full-scale range of ADC | FSR = 5V |
Sampling rate of ADC | fSAMPLE = 1MSPS |
PGA gain | 0.125, 0.25, 0.5, 1, 2,4, 8, 16 |
Input voltages (VPP, differential) | 25V, 16V, 8V, 4V, 2V, 1V, 0.5V, 0.25V |
Signal frequency | 1kHz |
RC kickback filter | RFIL = 15Ω, CDIFF = 1.2nF, CCM = 120pF |