SBOSAG3 March   2024 PGA849

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gain Control
      2. 7.3.2 Input Protection
      3. 7.3.3 Using the Output Difference Amplifier to Shape Noise
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 ADS8860 16-Bit, 1MSPS, Single-Ended Input, SAR ADC Driver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Differential to single-ended conversion
  • Eight pin-programmable binary gains
    • G (V/V) = ⅛, ¼, ½, 1, 2, 4, 8, and 16
  • Low gain error drift: 2ppm/°C (max)
  • Faster signal processing:
    • Wide bandwidth: 10MHz at all gains
    • High slew rate: 35V/µs
    • Settling time:
      500ns to 0.01%, 950ns to 0.0015%
    • Input stage noise: 7.8nV/√Hz at G = 16V/V
    • Filter option to achieve better SNR
  • Input overvoltage protection to ±40V beyond supplies
  • Input-stage supply range:
    • Single supply: 8V to 36V
    • Dual supply: ±4V to ±18V
  • Independent output power-supply pins
  • Output-stage supply range:
    • Single supply: 4.5V to 36V
    • Dual supply: ±2.25V to ±18V
  • Specified temperature range: ­–40°C to +125°C
  • Small package: 3mm × 3mm QFN