SLPS755A October   2023  – December 2023 RES11A-Q1

ADVMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 AEC-Q200 Qualification Testing
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 DC Measurement Configurations
    2. 6.2 AC Measurement Configurations
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ratiometric Matching
      2. 7.3.2 Ratiometric Drift
      3. 7.3.3 Predictable Voltage Coefficient
      4. 7.3.4 Ultra-Low Noise
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Discrete Difference Amplifier
        1. 8.1.1.1 Difference-Amplifier Common-Mode Rejection Analysis
      2. 8.1.2 Discrete Instrumentation Amplifiers
        1. 8.1.2.1 Instrumentation Amplifier Common-Mode Rejection Analysis
      3. 8.1.3 Fully Differential Amplifier
    2. 8.2 Typical Application
      1. 8.2.1 Common-Mode Shifting Input Stage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 9.1.1.3 TI Reference Designs
        4. 9.1.1.4 Filter Design Tool
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DDF|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Ratiometric Matching

The resistors of the RES11A-Q1 are described by the following equations:

Equation 1. R IN1 = R INnom × 1+ t abs = R INnom × 1+ t RIN1 × 1+ t SiCr
Equation 2. R IN2 = R INnom × 1+ t RIN2 × 1+ t SiCr
Equation 3. R G1 = R Gnom × 1+ t RG1 × 1+ t SiCr
Equation 4. R G2 = R Gnom × 1+ t RG2 × 1+ t SiCr

RINnom and RGnom are the nominal values of each resistor. The parameter tabs is an error term that describes the absolute tolerance of the RES11A-Q1 device in question, such that |tabs| ≤ 12%. The absolute tolerance is dominated by the variation in the SiCr resistivity, tSiCr. The four resistors of a given RES11A-Q1 are interdigitated and come from the same area of the wafer; therefore, tSiCr is effectively the same for each of the four resistors, although tSiCr varies on a part-to-part basis. The following examples show that when each divider is considered in ratiometric terms, these error terms drop out. Parameter tRx is an error term that describes the remaining effective tolerance of each resistor of the given RES11A-Q1 device after accounting for the universal tSiCr.

Equation 5. R Gx R INx = R Gnom × 1+ t RGx × 1+ t SiCr R INnom × 1+ t RINx × 1+ t SiCr = R Gnom × 1+ t RGx R INnom × 1+ t RINx = G nom × 1+ t RGx 1+ t RINx = G x
Equation 6. R INx R INx + R Gx = R INnom × 1+ t RINx × 1+ t SiCr R INnom × 1+ t RINx × 1+ t SiCr + R Gnom × 1+ t RGx × 1+ t SiCr = R INnom × 1+ t RINx R INnom × 1+ t RINx + R Gnom × 1+ t RGx

The RES11A-Q1 is specified with a maximum divider ratio tolerance of 0.05%, meaning that the relationship between the actual divider ratio Gx and nominal ratio Gnom of a given divider x is described by the following:

Equation 7. G x = G nom × 1+ t Dx

such that tDx0.05%. Because any devices that do not meet these criteria are screened out at final test, these equations can be used with Equation 5 to prove the effective bounds of tRx. Therefore, despite the device absolute end-to-end tolerance bounds of ±12%, the effective error tolerances of each resistor (for ratiometric applications) are within approximately ±0.025%, for the worst-case tRx.

The RES11A-Q1 is specified with a maximum divider matching tolerance of 0.1%, meaning that the relationship between the ratio of divider 1 (G1) and ratio of divider 2 (G2) is described by the following:

Equation 8. t M = t D2 t D1 = G 2 G 1 G nom

By definition, |tM| ≤ 0.1%. Again, the previous equations relate tM to the parameters tDX and tRX. As a result of the interdigitation of the two dividers, the actual typical magnitude of tM is significantly lower than this maximum value, depending on the specific RES11A-Q1 device. This value is used to calculate the common-mode rejection ratio (CMRR) when implementing a difference amplifier circuit. For example, typical tM for the RES11A40-Q1 is approximately 85 ppm, and the typical CMRR is 95.4 dB.