This design attenuates the high common-mode voltage of the bus to a level that falls within the linear input range of the AMC1311B-Q1. Some key possible circuit error sources can be considered as follows:

• The AMC1311B-Q1 has a typical input bias current of 3.5nA. With R_LV = 25kΩ, this input bias current manifests appears as an 88µV offset error at MID. When this offset is calculated in a root-sum-of-squares with the 400µV typical input offset voltage of the AMC1311B-Q1, a 410µV offset results. This offset represents 0.0205% of the 2V full-scale range, and is typically not the dominating error factor.
• The gain error and integrated nonlinearity error of the AMC1311B-Q1 can be approximated using the Isolated Amplifier Voltage Sensing Excel Calculator. For this example, the typical FSR error is calculated as 0.06%.
• The typical initial ratiometric gain tolerance of the RES60A500-Q1 is 0.02%, which sums with the previously mentioned errors of the AMC1311B-Q1 in a root-sum-of-squares manner to give a total typical FSR error of 0.066%.
• The level-shifting circuit introduces additional errors, and applies a gain factor to the previously discussed errors. However, due to the low offset of the OPA388-Q1 and high precision of the RES11A-Q1, these errors (0.012% FSR) are low enough to not significantly impact the final typical error.

The final calculated result of 0.068% typical FSR error represents a 1σ value, so a ±6σ estimate gives ±0.41% FSR error. The results suggest the circuit meets the ±0.5% FSR application requirement, with margin.