SLPS764 September   2024 RES60A-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Ratiometric Matching
      2. 6.3.2 Ultra-Low Noise
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Battery Stack Measurement
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 8.1.1.3 TI Reference Designs
        4. 8.1.1.4 Analog Filter Designer
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DWV|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

at ∆V = 1000V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RESISTANCE
RHV Input resistance 12.5 MΩ
RLV Ratio-dependent resistance RES60A210 59.5 kΩ
RES60A310 40.3
RES60A410 30.5
RES60A500 25
RES60A610 20.5
RES60A100 12.5
Gnom Nominal ratio RHV / RLV RES60A210 210
RES60A310 310
RES60A410 410
RES60A500(1) 499.1
RES60A610 610
RES60A100(2) 997.6
tD Initial ratio tolerance(3) (RHV / RLV) / Gnom – 1(4) RES60A210 ±0.1 %
RES60A310 ±0.03 ±0.1
RES60A410 ±0.02 ±0.1
RES60A500 ±0.02 ±0.1
RES60A610 ±0.1
RES60A100 ±0.02 ±0.1
Ratio tolerance drift across operating lifetime(5) 10 years, TA = –40°C to +85°C,
∆V = 1000V, (GINITIAL – GFINAL) / GINITIAL(4)		 ±0.2 %
tabs Absolute tolerance (per resistor)(6) ±15 %
TCRratio Temperature coefficient of resistance ratio(3)(5) TA = –40°C to +85°C ±1 ±5 ppm/°C
TA = –40°C to +125°C ±1
TCRabs Absolute temperature coefficient of resistance (per resistor)(6)(5) TA = –40°C to +125°C ±20 ppm/°C
VCRratio Voltage coefficient of resistance ratio ±2 ppm/V
IMPEDANCE
CIN Pin capacitance(7) HVIN to LVIN TBD pF
MID to LVIN TBD
–3dB bandwidth CMID to LVIN = 10pF RES60A210 268 kHz
RES60A310 395
RES60A410 521
RES60A500 637
RES60A610 776
RES60A100 1270
ts Settling time(5) To 0.1%, 10V step RES60A210 TBD µs
RES60A310 TBD
RES60A410 TBD
RES60A500 TBD
RES60A610 TBD
RES60A100 TBD
To 0.01%, 10V step RES60A210 TBD µs
RES60A310 TBD
RES60A410 TBD
RES60A500 TBD
RES60A610 TBD
RES60A100 TBD
eN Thermal noise density(7) f = 1kHz RES60A210 30 nV/√Hz
RES60A310 25
RES60A410 22
RES60A500 20
RES60A610 18
RES60A100 14
(1) For Advanced-Information devices, the typical value is 499.1. For Production-Data devices, this value will be 500.
(2) For Advanced-Information devices, the typical value is 997.6. For Production-Data devices, this value will be 1000.
(3) RHV / RLV vs nominal ratio.
(4) The specification is the result of this expression, given as a percentage (multiplied by 100%)
(5) Specified by characterization.
(6) RHV and RLV vs nominal values.
(7) Specified by design.