SCDS475A April   2024  – July 2024 SN4599-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Source or Drain Current through Switch
    6. 5.6 Electrical Characteristics
    7. 5.7 Analog Channel Specifications
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 On-Resistance
    2. 6.2 Off-Leakage Current
    3. 6.3 On-Leakage Current
    4. 6.4 Transition Time
    5. 6.5 Break-Before-Make
    6. 6.6 Charge Injection
    7. 6.7 Off Isolation
    8. 6.8 Crosstalk
    9. 6.9 Bandwidth
  8. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Feature Description
      1. 7.2.1 Bidirectional Operation
      2. 7.2.2 Rail to Rail Operation
      3. 7.2.3 Fail-Safe Logic
    3. 7.3 Device Functional Modes
    4. 7.4 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Switchable Operational Amplifier Gain Setting
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Input Control for Power Amplifier
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Analog Channel Specifications

over operating free-air temperature range (unless otherwise noted)
Parameter FROM (INPUT) TO (OUTPUT) TEST CONDITIONS VDD MIN NOM MAX UNIT
Frequency response (switch on) D or Sn Sn or D RL = 50 Ω, fin = sine wave 2 V 250 MHz
2.3 V 250
3 V 250
4.5 V 250
Crosstalk (between switches) S1 or S2 S2 or S1 RL = 50 Ω, fin = 1MHz sine wave 2 V -54 dB
2.3 V -54
3 V -54
4.5 V -54
Feed through attenuation (switch off) D or Sn Sn or D CL = 5 pF, RL = 50 Ω, fin = 1 MHz (sine wave) 2 V -57 dB
2.3 V -57
3 V -57
4.5 V -57
Charge injection SEL (Vs = VDD/2) D CL = 0.1 nF, RL = 1 MΩ 3.3 V 3 pC
5 V 7
Total harmonic distortion D or Sn Sn or D VI = 4.0 Vp-p, Vbias = VDD/2, RL = 10kΩ, fin = 600 Hz to 20kHz (sine wave) 4.5 V 0.01 %