SCHS367C October 2008 – April 2022 SN54AC00-SP
PRODUCTION DATA
- 1Features
- 2Applications
- 3Description
- 4Revision History
- 5Bare Die Information
- 6Specifications
- 7Parameter Measurement Information
- 8Device and Documentation Support
- 9Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
3 Description
The SN54AC00 device contains four independent 2-input NAND gates. Each gate performs the Boolean function of Y = A • B or Y = A + B in positive logic.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| SN54AC00-SP | CDIP (14) | 5.97 mm × 9.21 mm |
| CFP (14) | 6.67 mm × 19.56 mm | |
| KGD (0) | Not applicable |
(1) For all available packages, see the orderable addendum at the
end of the data sheet.
J or W Package(Top View)