SLLS961C July   2009  – June 2022 SN65HVDA195-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Local Interconnect Network (LIN) Bus
        1. 9.3.1.1 Transmitter Characteristics
        2. 9.3.1.2 Receiver Characteristics
      2. 9.3.2 Transmit Input (TXD)
      3. 9.3.3 Receive Output (RXD)
        1. 9.3.3.1 RXD Wake-Up Request
      4. 9.3.4 Supply Voltage (VSUP)
      5. 9.3.5 Ground (GND)
      6. 9.3.6 Enable Input (EN)
      7. 9.3.7 NWake Input (NWake)
      8. 9.3.8 Inhibit Output (INH)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operating Modes
      2. 9.4.2 Normal Mode
      3. 9.4.3 Sleep Mode
      4. 9.4.4 Wake-Up Events
      5. 9.4.5 Standby Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Typical Application
        1. 10.1.1.1 Design Requirements
        2. 10.1.1.2 Detailed Design Procedure
        3. 10.1.1.3 Application Curves
      2.      Power Supply Recommendations
      3. 10.1.2 Layout
        1. 10.1.2.1 Layout Guidelines
        2. 10.1.2.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The SN65HVDA195 device is the Local Interconnect Network (LIN) physical interface and MOST ECL interface, which integrates the serial transceiver with wake-up and protection features. The bus is a single-wire bidirectional bus typically used for low-speed in-vehicle networks using data rates to 20 kbps. The device can transmit with an effective data rate of 0 kbps because it does not have dominant state time-out. The protocol output data stream on TXD is converted by the SN65HVDA195 into the bus signal through a current-limited wave-shaping driver as outlined by the LIN physical layer specification revision 2.0. The receiver converts the data stream from the bus and outputs the data stream through RXD. The bus has two states: dominant state (voltage near ground) and the recessive state (voltage near battery). In the recessive state, the bus is pulled high by the SN65HVDA195 internal pullup resistor and series diode, so no external pullup components are required for responder applications. Commander applications require an external pullup resistor (1 kΩ) plus a series diode per the LIN specification.

Device Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
SN65HVDA195-Q1SOIC (8)4.90 mm × 3.91 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-94CF95C6-98B7-44A7-9C6B-64128BA76ED3-low.gifSimplified Block Diagram