SLLSEU5 December   2016 SN65LBC175A-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Detailed Description

8.1 Overview

The SN65LBC175A-EP is a quadruple differential line receiver with tri-state outputs, designed for TIA/EIA-485 (RS-485), TIA/EIA-422 (RS-422), and ISO 8482 (Euro RS-485) applications. This device is optimized for balanced multipoint bus communication at data rates up to and exceeding 50 million bits per second. The transmission media may be twisted-pair cables, printed-circuit board traces, or backplanes. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The receiver operates over a wide range of positive and negative common-mode input voltages, and features ESD protection to 6 kV, making it suitable for high-speed multipoint data transmission applications in harsh environments. These devices are designed using LinBiCMOS®, facilitating low-power consumption and robustness.

Two EN inputs provide pair-wise enable control, or these can be tied together externally to enable all four drivers with the same signal.

8.2 Functional Block Diagram

SN65LBC175A-EP logic_diagram_sllseu5.gif

8.3 Feature Description

The device can be configured using the enable inputs to select receiver output. The high voltage or logic 1 on the EN pin allows the device to operate on an active-high, and having a low voltage or logic 0 on the EN enables active-low operation. These are simple ways to configure the logic to match the receiving or transmitting controller or microprocessor.

8.4 Device Functional Modes

The receivers implemented in the RS-485 device can be configured using the EN logic pins set to enabled or disabled. This allows users to ignore or filter out transmissions as desired.

Table 1. Function Table(1)

DIFFERENTIAL INPUTS ENABLE OUTPUT
A - B (VID) EN Y
VID ≤ –0.2 V H L
–0.2 V < VID < –0.01 V H ?
–0.01 V ≤ VID H H
X L Z
X OPEN Z
Short circuit H H
Open circuit H H
(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off), ? = indeterminate