SCLSA22
October 2024
SN74LV4040B-EP
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements, VCC = 2.5V ± 0.2V
5.7
Timing Requirements, VCC = 3.3V ± 0.3V
5.8
Timing Requirements, VCC = 5V ± 0.5V
5.9
Switching Characteristics, VCC = 2.5V ± 0.2V
5.10
Switching Characteristics, VCC = 3.3V ± 0.3V
5.11
Switching Characteristics, VCC = 5V ± 0.5V
5.12
Noise Characteristics
5.13
Operating Characteristics
6
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Balanced CMOS Push-Pull Outputs
8.3.2
Latching Logic
8.3.3
Standard CMOS Inputs
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Power Considerations
9.2.1.2
Input Considerations
9.2.1.3
Output Considerations
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|16
MPDS361A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sclsa22_oa
sclsa22_pm
8
Detailed Description