SLLS040I August   1987  – January 2023 SN65ALS176 , SN75ALS176 , SN75ALS176A , SN75ALS176B

PRODUCTION DATA  

  1. Features
  2. Description
  3. Revision History
  4. Pin Configuration and Functions
  5. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Recommended Operating Conditions
    3. 5.3  Thermal Information
    4. 5.4  Electrical Characteristics - Driver
    5. 5.5  Switching Characteristics - Driver
    6. 5.6  Switching Characteristics - Driver
    7. 5.7  Symbol Equivalents
    8. 5.8  Electrical Characteristics - Receiver
    9. 5.9  Switching Characteristics - Receiver
    10. 5.10 Switching Characteristics - Receiver
    11. 5.11 Typical Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
  9. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Recommended Operating Conditions

(unless otherwise noted)
MIN NOM MAX UNIT
VCC Supply voltage 4.75 5 5.25 V
VI or VIC Input voltage at any bus terminal (separately or common mode) 12 V
–7
VIH High-level input voltage D, DE, and RE 2 V
VIL Low-level input voltage D, DE, and RE 0.8 V
VID Differential input voltage(1) ±12 V
IOH High-level output current Driver –60 mA
Receiver –400 μA
IOL Low-level output current Driver 60 mA
Receiver 8
TA Operating free-air temperature SN65ALS176 –40 85 °C
SN75ALS176 series 0 70
Differential input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B.