SLOS955 December   2016 TAS5414C

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements for I2C Interface Signals
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Descption
      1. 7.3.1  Preamplifier
      2. 7.3.2  Pulse-Width Modulator (PWM)
      3. 7.3.3  Gate Drive
      4. 7.3.4  Power FETs
      5. 7.3.5  Load Diagnostics
      6. 7.3.6  Protection and Monitoring
      7. 7.3.7  I2C Serial Communication Bus
      8. 7.3.8  I2C Bus Protocol
      9. 7.3.9  Hardware Control Pins
      10. 7.3.10 AM Radio Avoidance
    4. 7.4 Device Functional Modes
      1. 7.4.1 Audio Shutdown and Restart Sequence
      2. 7.4.2 Latched-Fault Shutdown and Restart Sequence Control
    5. 7.5 Programming
      1. 7.5.1 Random Write
      2. 7.5.2 Sequential Write
      3. 7.5.3 Random Read
      4. 7.5.4 Sequential Read
    6. 7.6 Register Maps
      1. 7.6.1  Register Summary
      2. 7.6.2  Registers
        1. 7.6.2.1 Fault Register 1 (0x00) Protection
      3. 7.6.3  Fault Register 2 (0x01) Protection
      4. 7.6.4  Diagnostic Register 1 (0x02) Load Diagnostics
      5. 7.6.5  Diagnostic Register 2 (0x03) Load Diagnostics
      6. 7.6.6  External Status Register 1 (0x04) Fault Detection
      7. 7.6.7  External Status Register 2 (0x05) Output State of Individual Channels
      8. 7.6.8  External Status Register 3 (0x06) Play and Mute Modes
      9. 7.6.9  External Status Register 4 (0x07) Load Diagnostics
      10. 7.6.10 External Control Register 1 (0x08) Gain Select
      11. 7.6.11 External Control Register 2 (0x09) Overcurrent Control
      12. 7.6.12 External Control Register 3 (0x0A) Switching Frequency Select and Clip_OTW Configuration
      13. 7.6.13 External Control Register 4 (0x0B) Load Diagnostics and Master/Slave Control
      14. 7.6.14 External Control Register 5 (0x0C) Output Control
      15. 7.6.15 External Control Register 6 (0x0D) Output Control
      16. 7.6.16 External Control Register 7 (0x10) Miscellaneous Selection
      17. 7.6.17 External Status Register 5 (0x13) Overtemperature and Thermal Foldback Status
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Hardware and Software Design
        2. 8.2.2.2 Parallel Operation (PBTL)
        3. 8.2.2.3 Input Filter Design
        4. 8.2.2.4 Amplifier Output Filtering
        5. 8.2.2.5 Line Driver Applications
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Consideration
    4. 10.4 Electrical Connection of Heat Slug and Heat Sink
    5. 10.5 EMI Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

A car battery that can have a large voltage range most commonly provides the power for the device. PVDD is a filtered battery voltage, and it is the supply for the output FETS and the low-side FET gate driver. The supply for the high-side FET gate driver comes from a charge pump (CP). The charge pump supplies the gate-drive voltage for all four channels. AVDD, provided by an internal linear regulator powers the analog circuitry. This supply requires 0.1-μF, 10-V external bypass capacitor at the A_BYP pin. TI recommends not connecting any external components except the bypass capacitor to this pin. DVDD, which comes from an internal linear regulator, powers the digital circuitry. The D_BYP pin requires a 0.1-μF, 10-V external bypass capacitor. TI recommends not connecting any external components except the bypass capacitor to this pin.

The TAS5414C can withstand fortuitous open-ground and -power conditions. Fortuitous open ground usually occurs when a speaker wire shorts to ground, allowing for a second ground path through the body diode in the output FETs. The diagnostic capability allows debugging of the speakers and speaker wires, eliminating the need to remove the amplifier to diagnose the problem.