SLOS982C August 2017 – April 2018 TAS5755M
PRODUCTION DATA.
As shown in Figure 61, a single-byte data-write transfer begins with the master device transmitting a start condition followed by the I2C device address and the read/write bit. The read/write bit determines the direction of the data transfer. For a data-write transfer, the read/write bit is a 0. After receiving the correct I2C device address and the read/write bit, the DAP responds with an acknowledge bit. Next, the master transmits the address byte or bytes corresponding to the TAS5755M internal memory address being accessed. After receiving the address byte, the TAS5755M again responds with an acknowledge bit. Next, the master device transmits the data byte to be written to the memory address being accessed. After receiving the data byte, the TAS5755M again responds with an acknowledge bit. Finally, the master device transmits a stop condition to complete the single-byte data-write transfer.