SCPS285A november   2022  – august 2023 TCAL9539-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 I2C Bus Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 Adjustable Output Drive Strength
      3. 8.3.3 Interrupt Output (INT)
      4. 8.3.4 Reset Input (RESET)
      5. 8.3.5 Software Reset Call
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
      3. 8.6.3 Register Descriptions
      4. 8.6.4 Bus Transactions
        1. 8.6.4.1 Writes
        2. 8.6.4.2 Reads
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Minimizing ICC When I/Os Control LEDs
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power-On Reset Requirements
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS   MIN TYP MAX UNIT
VIK Input diode clamp voltage II = –18 mA 1.08 V to 3.6 V –1.2 V
VPORR Power-on reset voltage, VCC rising VI = VCC or GND, IO = 0 0.85 1.0 V
VPORF Power-on reset voltage, VCC falling VI = VCC or GND, IO = 0 0.6 0.75 V
VOH P-port high-level output voltage(1) IOH = –8 mA; CC-XX = 11b 1.08 V 0.8 V
1.65 V 1.4
2.3 V 2.1
3 V 2.8
IOH = –2.5 mA & CC-XX = 00b; IOH = –5 mA & CC-XX = 01b; IOH = –7.5 mA & CC-XX = 10b; IOH = –10 mA & CC-XX = 11b;  1.08 V 0.75
1.65 V 1.4
2.3 V 2.1
3 V 2.8
VOL Low-level output voltage P ports IOL = 8 mA; CC-XX = 11b 1.08 V 0.2 V
1.65 V 0.15
2.3 V 0.1
3.0 V 0.1
P ports IOL = 2.5 mA and CC-XX = 00b;
IOL = 5 mA and CC-XX = 01b;
IOL = 7.5 mA and CC-XX = 10b;
IOL = 10 mA and CC-XX = 11b;		 1.08 V 0.25 V
1.65 V 0.15
2.3 V 0.1
3.0 V 0.1
IOL Low-level output current SDA VOL = 0.4 V 1.08 V to 3.6 V 20 mA
INT VOL = 0.4 V 4
II Input leakage current P ports VI = VCC or GND 1.08 V to 3.6 V ±1 µA
VI = 3.6 V 0 V ±1
II Input leakage current SCL, SDA,  RESET VI = VCC or GND 1.08 V to 3.6 V ±1
II Input leakage current VI = VCC or GND 1.08 V to 3.6 V ±1 µA
ICC Quiescent current Operating mode
(400 kHz)		 SDA, RESET =VCC, P ports, ADDR = VCC or GND,
I/O = inputs, fSCL = 400 kHz, –40°C < TA ≤ 85°C		 3.6 V 11 15 µA
2.7 V 8 11
1.95 V 5 8
1.32 V 2 6
SDA, RESET =VCC, P ports, ADDR = VCC or GND,
I/O = inputs, fSCL = 400 kHz, 85°C < TA ≤ 125°C		 3.6 V 7 24  µA
2.7 V 5 18
1.95 V 4 14
1.32 V 2 11
Operating mode
(1 MHz)		 SDA, RESET = VCC, P ports, ADDR = VCC or GND,
I/O = inputs, fSCL = 1 MHz, –40°C < TA ≤ 85°C		 3.6 V 34 µA
2.7 V 24
1.95 V 18
1.32 V 12
SDA, RESET = VCC, P ports, ADDR = VCC or GND,
I/O = inputs, fSCL = 1 MHz, 85°C < TA ≤ 125°C		 3.6 V 42 µA
2.7 V 30
1.95 V 22
1.32 V 16
Standby mode SCL, SDA, RESET = VCC, P port, ADDR = VCC or GND,
I/O = inputs, IO = 0, fSCL = 0 kHz,
-40 °C < TA ≤ 85 °C 		 3.6 V 1 3 µA
2.7 V 0.8 2.0
1.95 V 0.6 1.6
1.32 V 0.6 1.4
SCL, SDA, RESET = VCC. P port, ADDR = VCC or GND,
I/O = inputs, IO = 0, fSCL = 0 kHz,
85 °C < TA ≤ 125 °C 		 3.6 V 14 µA
2.7 V 10
1.95 V 8
1.32 V 6
Rpu(int) internal pull-up resistance P port 70 100 140 kΩ
Rpd(int) internal pull-down resistance
CI Input pin capacitance SCL VI = VCC or GND 1.08 V to 3.6 V 2.5 5 pF
CIO Input-output pin capacitance SDA VIO = VCC or GND 1.08 V to 3.6 V 6 8 pF
P port VIO = VCC or GND 1.08 V to 3.6 V 6 8.5
(1) Each I/O must be externally limited to a maximum of 25 mA, CC-XX refers to output drive strength register setting.