SLOSE96A january   2023  – july 2023 THS2630

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Down Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Common-Mode Voltage
        1. 8.1.1.1 Resistor Matching
      2. 8.1.2 Driving a Capacitive Load
      3. 8.1.3 Data Converters
      4. 8.1.4 Single-Supply Applications
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Active Antialias Filtering
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PowerPAD™ Integrated Circuit Package Design Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1) THS2630 UNIT
D (SOIC) DGK (VSSOP) DGN (HVSSOP)
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 126.3 147.3 57.6 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 67.3 37.9 76.3 °C/W
RθJB Junction-to-board thermal resistance 69.8 83.2 30.0 °C/W
ψJT Junction-to-top characterization parameter 19.5 0.9 4.0 °C/W
ψJB Junction-to-board characterization parameter 69.0 81.6 29.9 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A 14.3 °C/W
(1) For information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.