SLOS318L april   2000  – august 2023 THS4130 , THS4131

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Mode
  10. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Output Common-Mode Voltage
        1. 9.1.1.1 Resistor Matching
      2. 9.1.2 Driving a Capacitive Load
      3. 9.1.3 Data Converters
      4. 9.1.4 Single-Supply Applications
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 PowerPAD™ Integrated Circuit Package Design Considerations
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

To achieve the levels of high-frequency performance of the THS413x devices, follow proper printed-circuit board (PCB) high-frequency design techniques. Following is a general set of guidelines. In addition, a THS413x evaluation board is available to use as a guide for layout or for evaluating device performance.

  • Ground planes—Use a ground plane on the board to provide all components with a low inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance.
  • Proper power-supply decoupling—use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic capacitor on each supply pin. Sharing the tantalum among several amplifiers is possible depending on the application; however, always use a 0.1-µF ceramic capacitor on the supply pin of every amplifier. In addition, place the 0.1-µF capacitor as close as possible to the supply pin. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. Strive for distances of less than 0.1 inches between the device power pin and the ceramic capacitors.
  • Short trace runs or compact part placements—to optimize high-frequency performance, minimize stray series inductance. The best method is to make the circuit layout as compact as possible, thereby minimizing the length of all trace runs. Pay particular attention to the inputs of the amplifier; keep the length as short as possible. This short length helps minimize stray capacitance at the input of the amplifier.